參數(shù)資料
型號(hào): ISL6140CBZ-T
廠商: INTERSIL CORP
元件分類: 電源管理
英文描述: Negative Voltage Hot Plug Controller
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: MS-012-AA, PLASTIC, SOIC-8
文件頁數(shù): 17/18頁
文件大?。?/td> 511K
代理商: ISL6140CBZ-T
17
Figure 30 shows a sample component placement and
routing for the typical application shown in Figure 31.
NOTES:
1. Layout scale is approximate; routing lines are just for illustration
purposes; they do not necessarily conform to normal PCB
design rules. High current buses are wider, shown with parallel
lines.
2. Approximate size of the above layout is 1.6 x 0.6 inches; almost
half of the area is just the FET (D2PAK or similar SMD-220
package).
3. R1 sense resistor is size 2512; all other R’s and C’s shown are
0805; they can all potentially use smaller footprints, if desired.
4. The RL and CL are not shown on the layout.
5. R4 uses a via to connect to GND on the bottom of the board; all
other routing can be on top level. (It’s even possible to eliminate
the via, for an all top-level route).
6. PWRGD signal is not used here.
7. BOM (Bill Of Materials)
R1 = 0.02
(5%)
R2 = 10
(5%)
R3 = 18k
(5%)
R4 = 562k
(1%)
R5 = 9.09k
(1%)
R6 = 10k
(1%)
C1 = 150nF (25V)
C2 = 3.3nF (100V)
Q1 = IRF530 (100V, 17A, 0.11
)
G 6
D 7
VDD 8
2 OV
3 UV
4 VEE
1 PG
S 5
U1
R1
R5
G
S
DRAIN
FET
R4
R3
C2
R2
R6
C1
-48V IN
GND
GND
-48V OUT
FIGURE 30. SAMPLE LAYOUT (NOT TO SCALE)
ISL6140
V
DD
UV
OV
V
EE
SENSE
GATE
DRAIN
PWRGD
R4
R5
R6
R1
R2
R3
C2
C1
Q1
CL
GND
GND
-48V IN
-48V OUT
RL
(LOAD)
FIGURE 31. TYPICAL APPLICATION
ISL6140, ISL6150
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