參數(shù)資料
型號(hào): ISL59116IIZ-EVALZ
廠商: Intersil
文件頁數(shù): 2/10頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR ISL59116IIZ
標(biāo)準(zhǔn)包裝: 1
系列: *
10
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6277.0
September 21, 2006
ISL59116
Wafer Level Chip Scale Package (WLCSP)
PIN A1 ID AREA
A
E1
BOTTOM VIEW
A
B
12
C
3
b
D1
SIDE VIEW
A1
b
A2
TOP VIEW
bb
D
E
SD
W3x3.9A
3x3 ARRAY 9 BALL WAFER LEVEL CHIP SCALE PACKAGE
(For ISL59116, ISL59117 Only)
SYMBOL
MILLIMETERS
NOTES
A
0.62 +0.05 -0.08
-
A1
0.24 ±0.025
-
A2
0.38 REF.
-
b
0.32 ±0.03
-
bb
θ 0.30 REF.
-
D
1.45 ±0.05
-
D1
1.00 BASIC
-
E
1.45 ±0.05
-
E1
1.00 BASIC
-
e
0.50 BASIC
-
SD
0.00 BASIC
-
N9
3
Rev. 1 6/06
NOTES:
1. Dimensions are in Millimeters.
2. Dimensioning and tolerancing conform to ASME 14.5M-1994.
3. Symbol “N” is the actual number of solder balls.
4. Reference JEDEC MO-211-C, variation DD.
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