8 FN6550.3 May 6, 2013 Detailed Description The ISL54501 and ISL54502 are bi-directional, single pole/single throw (SPST) an" />
參數(shù)資料
型號(hào): ISL54502IHZ-T
廠商: Intersil
文件頁(yè)數(shù): 12/13頁(yè)
文件大?。?/td> 0K
描述: IC SWITCH SPDT SOT23-6
標(biāo)準(zhǔn)包裝: 3,000
功能: 開關(guān)
電路: 1 x SPST- NC
導(dǎo)通狀態(tài)電阻: 5 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V
電流 - 電源: 20nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6
供應(yīng)商設(shè)備封裝: SOT-23-6
包裝: 帶卷 (TR)
ISL54501, ISL54502
8
FN6550.3
May 6, 2013
Detailed Description
The ISL54501 and ISL54502 are bi-directional, single
pole/single throw (SPST) analog switches. They offer precise
switching capability from a single 1.62V to 5.5V supply with
low ON-resistance and high speed operation. With a single
supply of 5V the typical ON-resistance is only 5
Ω, with a typical
turn-on and turn-off time of: tON = 22ns, tOFF = 15ns. The
devices are especially well suited for portable battery powered
equipment due to their low operating supply voltage (1.62V),
low power consumption (0.11W), low leakage currents (300nA
max), and tiny TDFN package.
The ISL54501 is a single normally open (NO) SPST analog
switch. The ISL54502 is a single normally closed (NC) SPST
analog switch.
External V+ Series Resistor
For improved ESD and latch-up immunity, Intersil recommends
adding a 100
Ω resistor in series with the V+ power supply pin
of the ISL54501, ISL54502 IC (see Figure 6).
During an overvoltage transient event (such as occurs during
system level IEC 61000 ESD testing), substrate currents can be
generated in the IC that can trigger parasitic SCR structures to
turn ON, creating a low impedance path from the V+ power
supply to ground. This will result in a significant amount of
current flow in the IC, which can potentially create a latch-up
state or permanently damage the IC. The external V+ resistor
limits the current during this over-stress situation and has
been found to prevent latch-up or destructive damage for
many over voltage transient events.
Under normal operation the sub-microamp IDD current of the
IC produces an insignificant voltage drop across the 100
Ω
series resistor resulting in no impact to switch operation or
performance.
Supply Sequencing And Overvoltage
Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents,
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 7). To prevent forward biasing these diodes, V+ must be
applied before any input signals, and the input signal voltages
must remain between V+ and GND.
If these conditions cannot be guaranteed then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provided additional protection to limit the current in the
event that the voltage at a signal pin or logic pin goes below
ground or above the V+ rail.
Logic inputs can easily be protected by adding a 1k
Ω resistor
in series with the input (see Figure 7). The resistor limits the
input current below the threshold that produces permanent
damage, and the sub-microamp input current produces an
insignificant voltage drop during normal operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the purpose
of using a low rON switch. Connecting Schottky diodes to the
signal pins (as shown in Figure 9) will shunt the fault current to
the supply or to ground, thereby protecting the switch. These
Schottky diodes must be sized to handle the expected fault
current.
Power-Supply Considerations
The ISL54501, ISL54502 construction is typical of most single
supply CMOS analog switches in that they have two supply
pins: V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL54501, ISL54502
5.5V maximum supply voltage provides plenty of room for the
10% tolerance of 3.6V supplies, as well as room for overshoot
and noise spikes.
The minimum recommended supply voltage is 1.8V ± 10% but
the part will operate with a supply below 1.62V. It is important
to note that the input signal range, switching times, and
ON-resistance degrade at lower supply voltages. Refer to the
“Electrical Specifications” tables starting on page 4 the and
“Typical Performance Curves” starting on page 9 for details.
FIGURE 6. V+ SERIES RESISTOR FOR ENHANCED ESD AND
LATCH-UP IMMUNITY
IN
COM
100
Ω
NO
NC
V+
GND
C
OPTIONAL
PROTECTION
RESISTOR
FIGURE 7. OVERVOLTAGE PROTECTION
GND
VCOM
VNX
V+
INX
OPTIONAL
PROTECTION
RESISTOR
OPTIONAL
SCHOTTKY
DIODE
OPTIONAL
SCHOTTKY
DIODE
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