參數(shù)資料
型號(hào): ISL51002CQZ-110
廠商: Intersil
文件頁(yè)數(shù): 9/33頁(yè)
文件大?。?/td> 0K
描述: IC FRONT END 10BIT VID 128-MQFP
標(biāo)準(zhǔn)包裝: 66
位數(shù): 10
通道數(shù): 3
功率(瓦特): 1.2W
電壓 - 電源,模擬: 1.8V,3.3V
電壓 - 電源,數(shù)字: 1.8V,3.3V
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-MQFP(14x20)
包裝: 托盤(pán)
17
FN6164.3
February 29, 2012
0x29
Output Format 2, (0x00)
0
DATACLK Polarity
0: Pixel data changes on falling edge (default)
1: Pixel data changes on rising edge
1
FIELD output polarity
0: Odd = low, Even = high (default)
1: Odd = high, Even = low
2
Macrovision
0: Digitize Macrovision encoded signals (default)
1: Blank AFE output for Macrovision encoded signals. If
Macrovision is detected, AFE output is always 0x00 0x00
0x00 for RGB, or 0x00, 0x80, 0x80 for YUV.
3HSOUT Polarity
0: Active High (default)
1: Active Low
4HSOUT Lock Edge
0: HSOUT’s leading edge is locked to selected HSYNCIN’s
lockedge. Trailing edge moves forward in time as HSOUT
width is increased (default).
1: HSOUT’s trailing edge is locked to selected HSYNCIN’s
lockedge. Leading edge moves backward in time as HSOUT
width is increased.
5
XTALCLKOUT Frequency
0: XTALCLKOUT= fCRYSTAL (default)
1: XTALCLKOUT= fCRYSTAL/2
6
Enable XTALCLKOUT
0 = XTALCLKOUT is logic low (default)
1 = XTALCLKOUT enabled
0x2A
HSOUT Width, (0x10)
7:0
HSOUT Width
HSOUT Width in pixels, 0x00 to 0xFF. HSOUT Lock Edge
determines whether leading or trailing edge is locked to
HSYNCIN
0x2B
Output Signal Disable,
(0xFF)
Note: All digital outputs are
tristated by default to ease
multiplexing with other
AFEs
0
Tri-state Red
0 = Outputs enabled
1 = Outputs in tri-state
1
Tri-state Green
0 = Outputs enabled
1 = Outputs in tri-state
2
Tri-state Blue
0 = Outputs enabled
1 = Outputs in tri-state
3
Tri-state SYNC
0 = HSOUT, HSYNCOUT, VSYNCOUT enabled
1 = Outputs in tri-state
4
Tri-state DATACLK
0 = Output enabled
1 = Output in tri-state
5
Tri-state DATACLKb
0 = Output enabled
1 = Output in tri-state
6
Tri-state DE
0 = Output enabled
1 = Output in tri-state
7
Tri-state Field
0 = Output enabled
1 = Output in tri-state
0x2C
Power Control, (0x00)
0
Red Power Down
0 = Red ADC operational (default)
1 = Red ADC powered down
1
Green Power Down
0 = Green ADC operational (default)
1 = Green ADC powered down
2
Blue Power Down
0 = Blue ADC operational (default)
1 = Blue ADC powered down
3
PLL Power Down
0 = PLL operational (default)
1 = PLL powered down
Register Listing (Continued)
ADDRESS
REGISTER
(DEFAULT VALUE)
BITS
FUNCTION NAME
DESCRIPTION
ISL51002
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