
5
FN6096.1
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. ADDRESS tTRANS MEASUREMENT POINTS
Repeat test for other switches. CL includes fixture and stray
capacitance.
FIGURE 1B. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
FIGURE 2A. Q MEASUREMENT POINTS
FIGURE 2B. Q TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
FIGURE 3A. tBBM MEASUREMENT POINTS
Repeat test for other switches. CL includes fixture and stray
capacitance.
FIGURE 3B. tBBM TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
50%
tr < 5ns
tf < 5ns
tTRANS
90%
V+
0V
tTRANS
LOGIC
INPUT
SWITCH
OUTPUT
10%
VOUT
0V
VA0, VB0
VOUT
V(NO or NC)
RL
RL R ON
()
+
------------------------------
=
LOGIC
INPUT
VOUT
RL
COMA
A0,B0
ADD1-0
50
35pF
GND
A1-A3
CL
V+
C
V+
C
COMB
B1-B3
VOUT
V
OUT
OFF
ON
OFF
Q =
VOUT x CL
SWITCH
OUTPUT
LOGIC
INPUT
V+
0V
CL
VOUT
RG
VG
GND
COMA
Ax, Bx
LOGIC
INPUT
ADDX
V+
C
Repeat test for other switches.
1nF
0
COMB
90%
V+
0V
tBBM
LOGIC
INPUT
SWITCH
OUTPUT
0V
VOUT
tr < 5ns
tf < 5ns
LOGIC
INPUT
ADD1-0
COMA
RL
CL
VOUT
35pF
50
A0-A3
GND
V+
C
V+
C
B0-B3
COMB
ISL43L840