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參數(shù)資料
| 型號： | ISL3330IAZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | Buffer和線驅(qū)動 |
| 英文描述： | 3.3V, ±15kV ESD Protected, Dual Protocol (RS-232/RS-485) Transceivers; Temperature Range: -40°C to 85°C; Package: 20-SSOP T&R |
| 中文描述： | DUAL LINE TRANSCEIVER, PDSO20 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-150AE, SSOP-20 |
| 文件頁數(shù)： | 9/25頁 |
| 文件大小： | 945K |
| 代理商： | ISL3330IAZ-T |
17
FN6361.0
May 20, 2008
ISL3331 (QFN Package) Special Features
Logic Supply (VL Pin)
The ISL3331 (QFN) includes a VL pin that powers the logic
inputs (Tx inputs and control pins) and Rx outputs. These
pins interface with “l(fā)ogic” devices such as UARTs, ASICs,
and controllers, and today many of these devices use
power supplies significantly lower than 3.3V. Thus, a 3.3V
output level from a 3.3V powered dual protocol IC might
seriously overdrive and damage the logic device input.
Similarly, the logic device’s low VOH might not exceed the
VIH of a 3.3V powered dual protocol input. Connecting the
VL pin to the power supply of the logic device (as shown in
Figure 14) and reduces the Tx and control input switching
points to values compatible with the logic device output
levels. Tailoring the logic pin input switching points and
output levels to the supply voltage of the UART, ASIC, or
controller eliminates the need for a level shifter/translator
between the two ICs.
VL can be anywhere from VCC down to 1.2V, but the input
switching points may not provide enough noise margin when
various VL voltages so the user can ascertain whether or not
a particular VL voltage meets his needs.
.
Note: With VL ≤ 1.6V, the ISL3331 may not operate at the full
data rate unless the logic signal VIL is at least 0.2V below
the typical value listed in Table 5.
The VL supply current (IL) is typically less than 35A, as
to inputs with internal pull-up resistors (SPB, SLEW, RXEN)
being driven to the low input state. The worst case IL current
occurs when all three of the inputs are low (see Figure 19),
due to the IL through the pull-up resistors. IIL through an
by about 18A (at VL = 3.3V) when the SPB is high and 232
mode disables the SLEW pin pull-up (middle vs top curve).
When all three inputs are driven high, IL drops to ~10nA.
Thus, to minimize power dissipation, drive these inputs high
when unneeded (e.g., SPB isn’t used in RS-232 mode, so
drive it high).
QFN logic input pins that are externally tied high in an
application, should use the VL supply for the high voltage
level.
Active Low Rx Enable (RXEN)
In many RS-485 applications, especially half duplex
configurations, users like to accomplish “echo cancellation”
by disabling the corresponding receiver while its driver is
transmitting data. This function is available on the QFN
package via an active low RXEN pin. The active low function
also simplifies direction control by allowing a single Tx/Rx
direction control line. If the active high RXEN were used,
either two valuable I/O pins would be used for direction
control, or an external inverter is required between DEN and
RXEN. Figure 12 details the advantage of using the RXEN
pin. When using RXEN, ensure that RXEN is tied to GND.
RS-485 Slew Rate Limited Data Rates
The ISL333x FAST speed option (SLEW = High) utilizes Tx
output transitions optimized for a 20Mbps data rate. These
fast edges may increase EMI and reflection issues, even
though fast transitions aren’t required at the lower data rates
used by many applications. With the SLEW pin low, both
product types switch to a moderately slew rate limited output
transition targeted for 460kbps (MED) data rates. The
ISL3331 (QFN version), offers an additional slew rate limited
data rate that is optimized for 115kbps (SLOW), and is
selected when SLEW = 0 and SPB = 0 (see Table 3). The
FIGURE 11. USING VL PIN TO ADJUST LOGIC LEVELS
GND
RXD
TXD
VCC = +2V
UART/PROCESSOR
GND
RA
DY
VCC = +3.3V
ISL3330
VOH ≤ 2
VOH = 3.3V
VIH ≥ 2
ESD
DIODE
GND
RXD
TXD
VCC = +2V
UART/PROCESSOR
GND
RA
DY
VCC = +3.3V
ISL3331
VOH ≤ 2
VOH = 2V
VIH = 1.4V
ESD
DIODE
VL
TABLE 5. VIH AND VIL vs VL FOR VCC = 3.3V
VL (V)
VIH (V)
VIL (V)
1.2
0.85
0.26
1.5
0.9
0.5
1.8
0.9
0.73
2.3
1.2
1.0
2.7
1.4
1.3
3.3
1.8
1.7
ISL3330, ISL3331
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| ISL3331IRZ-T | 3.3V, ±15kV ESD Protected, Dual Protocol (RS-232/RS-485) Transceivers; Temperature Range: -40°C to 85°C; Package: 40-QFN T&R |
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參數(shù)描述 |
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| ISL3330IAZ-T7A | 功能描述:IC TXRX RS232/485 DUAL 20SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:發(fā)射器 驅(qū)動器/接收器數(shù):4/0 規(guī)程:RS422，RS485 電源電壓:4.75 V ~ 5.25 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR) |
| ISL3331 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Worlda??s Most Power-Effi cient |
| ISL3331EVAL1Z | 功能描述:EVAL BOARD 1 FOR ISL3331 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| ISL3331IRZ | 功能描述:IC TXRX 3.3V RS232/485 40-QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:發(fā)射器 驅(qū)動器/接收器數(shù):4/0 規(guī)程:RS422，RS485 電源電壓:4.75 V ~ 5.25 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR) |
| ISL3331IRZ-T | 功能描述:IC TXRX 3.3V RS232/485 40-QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:發(fā)射器 驅(qū)動器/接收器數(shù):4/0 規(guī)程:RS422，RS485 電源電壓:4.75 V ~ 5.25 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR) |
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