參數(shù)資料
型號: ISL28138FBZ-T7
廠商: Intersil
文件頁數(shù): 3/16頁
文件大?。?/td> 0K
描述: IC OPAMP SGL/DUAL 4.5MHZ 8-SOIC
標準包裝: 1,000
放大器類型: 通用
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 4.8 V/µs
增益帶寬積: 4.5MHz
-3db帶寬: 13MHz
電流 - 輸入偏壓: 1pA
電壓 - 輸入偏移: 6µV
電流 - 電源: 900µA
電流 - 輸出 / 通道: 75mA
電壓 - 電源,單路/雙路(±): 2.4 V ~ 5.5 V,±1.2 V ~ 2.75 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
11
FN6336.2
February 19, 2008
Applications Information
Introduction
The ISL28138 and ISL28238 are single and dual channel
CMOS rail-to-rail input, output (RRIO) micropower precision
operational amplifiers. The parts are designed to operate
from single supply (2.4V to 5.5V) or dual supply (±1.2V to
±2.75V). The parts have an input common mode range that
extends 0.25V above the positive rail and 100mV below the
the negative supply rail. The output operation can swing
within about 3mV of the supply rails with a 100k
Ω load.
Rail-to-Rail Input
Many rail-to-rail input stages use two differential input pairs,
a long-tail PNP (or PFET) and an NPN (or NFET). Severe
penalties have to be paid for this circuit topology. As the
input signal moves from one supply rail to another, the
operational amplifier switches from one input pair to the
other causing drastic changes in input offset voltage and an
undesired change in magnitude and polarity of input offset
current.
The ISL28138 and ISL28238 achieve input rail-to-rail
operation without sacrificing important precision
specifications and degrading distortion performance. The
devices’ input offset voltage exhibits a smooth behavior
throughout the entire common-mode input range. The input
bias current versus the common-mode voltage range gives
us an undistorted behavior from typically 100mV below the
negative rail and 0.25V higher than the V+ rail.
Pin Descriptions
ISL28138
(6 Ld SOT-23)
ISL28138
(8 Ld SOIC)
ISL28238
(8 Ld SOIC)
(8 Ld MSOP)
PIN NAME
FUNCTION
EQUIVALENT CIRCUIT
1, 5
NC
Not connected
42
2 (A)
6 (B)
IN-
IN-_A
IN-_B
inverting input
Circuit 1
33
3 (A)
5 (B)
IN+
IN+_A
IN+_B
Non-inverting
input
(See circuit 1)
2
4
V-
Negative supply
Circuit 2
16
1 (A)
7 (B)
OUT
OUT_A
OUT_B
Output
Circuit 3
6
7
8
V+
Positive supply
(See circuit 2)
58
EN
Chip enable
Circuit 4
IN-
V+
V-
IN+
V+
V-
CAPACITIVELY
COUPLED
ESD CLAMP
V+
V-
OUT
V+
V-
EN
ISL28138, ISL28238
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