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參數(shù)資料
| 型號： | ISL28110FBZ-T7A |
| 廠商： | Intersil |
| 文件頁數(shù)： | 13/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP JFET 12.5MHZ LN 8SOIC |
| 產(chǎn)品培訓模塊： | Patient Monitoring and Diagnostic Equipment Solutions Solutions for Test and Measurement Equipment Solutions for Industrial Control Applications |
| 標準包裝： | 1 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉換速率： | 20 V/µs |
| 增益帶寬積： | 12.5MHz |
| 電流 - 輸入偏壓： | 2pA |
| 電壓 - 輸入偏移： | 300µV |
| 電流 - 電源： | 2.55mA |
| 電流 - 輸出 / 通道： | 50mA |
| 電壓 - 電源，單路/雙路(±)： | 9 V ~ 40 V，±4.5 V ~ 20 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 標準包裝 |
| 其它名稱： | ISL28110FBZ-T7ADKR |
ISL28110, ISL28210
20
FN6639.3
November 29, 2012
FIGURE 54. CHARACTERIZED LARGE SIGNAL TRANSIENT RESPONSE
vs RL, VS = ±0.9V, ±2.5V
FIGURE 55. SIMULATED LARGE SIGNAL TRANSIENT RESPONSE vs
RL, VS = ±0.9V, ±2.5V
FIGURE 56. SIMULATED (DESIGN) OPEN-LOOP GAIN, PHASE vs
FREQUENCY
FIGURE 57. SIMULATED (SPICE) OPEN-LOOP GAIN, PHASE vs
FREQUENCY
FIGURE 58. SIMULATED (DESIGN) CMRR
FIGURE 59. SIMULATED (SPICE) CMRR
Characterization vs Simulation Results (Continued)
-6
-4
-2
0
2
4
6
012
34
56
78
9
10
V
O
U
T
(V
)
TIME (s)
VS = ±15V
AV = 1
RL = 2k
CL = 4pF
-6
-4
-2
0
2
4
6
02
46
8
10
V
O
U
T
(V
)
TIME (s)
VS = ±15V
AV = 1
RL = 2k
CL = 4pF
-100
-80
-60
-40
-20
0
20
40
60
80
100
120
140
160
180
200
0.1
1
10
100
1k
10k 100k 1M 10M 100M 1G
G
A
IN
(d
B
)
FREQUENCY (Hz)
VS = ±15V
RL=1M
GAIN
PHASE
-100
-80
-60
-40
-20
0
20
40
60
80
100
120
140
160
180
200
0.1
1
10
100
1k
10k 100k 1M 10M 100M 1G
G
A
IN
(d
B
)
FREQUENCY (Hz)
VS = ±15V
RL=1M
GAIN
PHASE
0.1
1
10
100
1k
10k 100k
1M
10M 100M
C
M
R
(d
B
)
FREQUENCY (Hz)
0
10
20
30
40
50
60
70
80
90
100
110
120
130
VS = ±15V
SIMULATION
0.1
1
10
100
1k
10k 100k
1M
10M 100M
C
M
R
(d
B
)
FREQUENCY (Hz)
0
10
20
30
40
50
60
70
80
90
100
110
120
130
VS = ±15V
SIMULATION
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