17 FN7874.0 June 21, 2011 transition from a very low impedance “make” to a much higher impedance “break” within a short period of time" />
參數(shù)資料
型號: ISL23445WFVZ-T7A
廠商: Intersil
文件頁數(shù): 9/20頁
文件大?。?/td> 0K
描述: IC DGTL POT QUAD 10K 20TSSOP
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 1
系列: XDCP™
接片: 256
電阻(歐姆): 10k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 125 ppm/°C
存儲器類型: 易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 1.2 V ~ 5.5 V,1.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ISL23445WFVZ-T7ADKR
ISL23445
17
FN7874.0
June 21, 2011
transition from a very low impedance “make” to a much higher
impedance “break” within a short period of time (<1s). There
are several code transitions such as 0Fh to 10h, 1Fh to 20h,...,
EFh to FFh, which have higher transient glitch. Note, that all
switching transients will settle well within the settling time as
stated in the datasheet. A small capacitor can be added
externally to reduce the amplitude of these voltage transients,
but that will also reduce the useful bandwidth of the circuit, thus,
this may not be a good solution for some applications. It may be
a good idea, in this case, to use fast amplifiers in a signal chain
for fast recovery.
VLOGIC Requirements
It is recommended to keep VLOGIC powered all the time during
normal operation. In a case where turning VLOGIC OFF is
necessary, it is recommended to ground the VLOGIC pin of the
ISL23445. Grounding the VLOGIC pin or both VLOGIC and VCC does
not affect other devices on the same bus. It is good practice to put
a 1F capacitor in parallel with 0.1F decoupling capacitor close to
the VLOGIC pin.
VCC Requirements and Placement
It is recommended to put a 1F capacitor in parallel with 0.1F
decoupling capacitor close to the VCC pin.
CS
SCK
MOSI
MISO
CS
SCK
SDI
SDO
CS
SCK
SDI
SDO
CS
SCK
SDI
SDO
CS
SCK
SDI
SDO
C
DCP0
DCP1
DCP2
DCP(N-1)
FIGURE 29. DAISY CHAIN CONFIGURATION
N DCP IN A CHAIN
CS
SCK
SDI
SDO 0
WR
D C P2
WR
D C P1
WR
D C P0
WR
D C P1
SDO 1
WR
D C P2
SDO 2
WR
FIGURE 30. DAISY CHAIN WRITE SEQUENCE OF N = 3 DCP
16 CLKLS
16 CLKS
FIGURE 31. TWO BYTE READ INSTRUCTION
CS
SCK
SDI
SDO
INSTRUCTION
ADDR
DATA IN
DATA OUT
1
2
10
11
12
13
14
15
16
345
67
8
9
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