All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certificati" />
參數(shù)資料
型號(hào): ISL22317WFRTZ
廠商: Intersil
文件頁(yè)數(shù): 6/15頁(yè)
文件大?。?/td> 0K
描述: IC POT DGTL 128TP LN LP 10-TDFN
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 100
系列: XDCP™
接片: 128
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±10 ppm/°C
存儲(chǔ)器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-TDFN-EP(3x3)
包裝: 管件
14
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6912.1
April 15, 2010
Rheostat Mode Configuration
When DCP is used as a two-terminal variable resistor, the
RH terminal should be left unconnected and MSR<7> is 0.
Resistance between RW and RL terminal can be calculated
by Equation 1:
Where i is a decimal code from 0 to 127. Note, that
resistance accuracy will decrease at the lowest and the
highest taps, where voltage drops < 0.3V. In other words, a
minimum and maximum decimal code at which the DCP
resistance not exceed 3% precision is as shown in
Equations 2 and 3:
Where Iwiper is a current going through the wiper terminal.
Voltage Divider Mode Configuration
In Voltage Divider Mode, voltage or signal is applied
between RH and RL terminals and MSR<7> is 1. A potential
at RH terminal must be higher than at RL terminal at any
time. Total resistance between RH and RL terminal is fixed
and matched to external reference resistor. Voltage on the
wiper terminal RW can be calculated by Equation 4:
Where i is a decimal code from 0 to 127. Note, that the wiper
voltage accuracy will decrease at the lowest and the highest
taps, where it is less than 0.3V from ground or from VCC
respectively.
Applications Information
In order to get better accuracy in applications where RL pin
is connected to GND, it is highly recommended that REF_B
pin is also connected to GND.
The coupling capacitors of 1F and 0.1F should be placed
close to VCC pin.
Ri
Rtotal
127
-----------------
i
×
=
(EQ. 1)
imin
()
0.3 127
×
Iwiper Rtotal
×
------------------------------------------
=
(EQ. 2)
imax
()
Vcc 0.3
() 127
×
Iwiper Rtotal
×
----------------------------------------------
=
(EQ. 3)
Vrw i
()
Vrh Vrl
127
------------------------
i
×
=
(EQ. 4)
Revision History
DATE
REVISION
CHANGE
4/6/10
FN6912.1
Page 10 description of Pin A1 references Table 3 changed to Table 4.
Page 5, tHD:DAT parameter test condition,"From SCL rising edge ..." changed to "From SCL falling
edge ..."
Added MSL note to ordering information. Replaced POD to recent version with following changes:
1. Removed mention of "b" from Note 4 since "b" does not exist on the drawing.
2. Added Note 6 callout to lead width on "Bottom View".
3. Corrected the word "indentifier" in Note 6 to read "identifier".
5/26/09
FN6912.0
Initial Release of Datasheet. Issued FN6912 making it a Rev 0.
ISL22317
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