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參數(shù)資料
| 型號： | ISD5100 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | SINGLE-CHIP 1 TO 16 MINUTES DURATION VOICE RECORD/PLAYBACK DEVICES WITH DIGITAL STORAGE CAPABILITY |
| 中文描述： | 單芯片1到16分鐘的語音記錄/播放設(shè)備數(shù)字存儲能力 |
| 文件頁數(shù)： | 23/88頁 |
| 文件大?。?/td> | 612K |
| 代理商： | ISD5100 |
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ISD5100 – SERIES
Publication Release Date: October, 2003
- 23 -
Revision 0.2
To select this mode, the following control bits must be configured in the ISD5100 Series configuration
registers. To set up the transmit path:
1. Select the FTHRU path through the ANA OUT MUX—Bits AOS0, AOS1 and AOS2 control the
state of the ANA OUT MUX. These are the D6, D7 and D8 bits respectively of Configuration
Register 0 (CFG0) and they should all be ZERO to select the FTHRU path.
2. Power up the ANA OUT amplifier—Bit AOPD controls the power up state of ANA OUT. This is
bit D5 of CFG0 and it should be a ZERO to power up the amplifier.
To set up the receive path:
1. Set up the ANA IN amplifier for the correct gain—Bits AIG0 and AIG1 control the gain settings
of this amplifier. These are bits D14 and D15 respectively of CFG0. The input level at this pin
determines the setting of this gain stage. The
ANA IN Amplifier Gain Settings table
on page
36 will help determine this setting. In this example, we will assume that the peak signal never
goes above 1 volt p-p single ended. That would enable us to use the 9 dB attenuation setting,
or where D14 is ONE and D15 is ZERO.
2. Power up the ANA IN amplifier—Bit AIPD controls the power up state of ANA IN. This is bit
D13 of CFG0 and should be a ZERO to power up the amplifier.
3. Select the ANA IN path through the OUTPUT MUX—Bits OPS0 and OPS1 control the state of
the OUTPUT MUX. These are bits D3 and D4 respectively of CFG0 and they should be set to
the state where D3 is ONE and D4 is ZERO to select the ANA IN path.
4. Power up the Speaker Amplifier—Bits OPA0 and OPA1 control the state of the Speaker and
AUX amplifiers. These are bits D1 and D2 respectively of CFG0. They should be set to the
state where D1 is ONE and D2 is ZERO. This powers up the Speaker Amplifier and
configures it for its higher gain setting for use with a piezo speaker element and also powers
down the AUX output stage.
The status of the rest of the functions in the ISD5100 Series chip must be defined before the con-
figuration registers settings are updated:
1.
Power down the Volume Control Element
—
Bit VLPD controls the power up state of the
Volume Control. This is bit D0 of CFG0 and it should be set to a ONE to power down this
stage.
2.
Power down the AUX IN amplifier
—
Bit AXPD controls the power up state of the AUX IN input
amplifier. This is bit D10 of CFG0 and it should be set to a ONE to power down this stage.
3.
Power down the SUM1 and SUM2 Mixer amplifiers
—
Bits S1M0 and S1M1 control the SUM1
mixer and bits S2M0 and S2M1 control the SUM2 mixer. These are bits D7 and D8 in CFG1
and bits D5 and D6 in CFG1 respectively. All 4 bits should be set to a ONE to power down
these two amplifiers.
4.
Power down the FILTER stage
—
Bit FLPD controls the power up state of the FILTER stage in
the device. This is bit D1 in CFG1 and should be set to a ONE to power down the stage.
5.
Power down the AGC amplifier
—
Bit AGPD controls the power up state of the AGC amplifier.
This is bit D0 in CFG1 and should be set to a ONE to power down this stage.
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| ISD5102EY | 功能描述:IC VOICE REC/PLAY 1-2MN 28-TSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5100 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5102EYI | 功能描述:IC VOICE REC/PLAY 1-2MN 28-TSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5100 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5102EYIR | 功能描述:IC VOICE REC/PLAY 1-2MN 28-TSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5100 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5102EYR | 功能描述:IC VOICE REC/PLAY 1-2MN 28-TSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5100 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5102SY | 功能描述:IC VOICE REC/PLAY 1-2MN 28-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5100 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
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