Publication Release Date: Oct 31 2008 - 19 - Revision 1.2 6.4 SERIAL
參數(shù)資料
型號: ISD5008SY
廠商: Nuvoton Technology Corporation of America
文件頁數(shù): 11/54頁
文件大?。?/td> 0K
描述: IC VOICE REC/PLAY 4-8MIN 28-SOIC
標(biāo)準(zhǔn)包裝: 25
系列: ISD5008
接口: SPI/Microwire
濾波器通頻帶: 1.7 ~ 3.4kHz
持續(xù)時(shí)間: 4-8 分鐘
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC
配用: ISD-ES511-ND - EVALUATION SYSTEM FOR ISD5100
ISD-ES501-ND - EVALUATION SYSTEM FOR ISD5008
ISD5008
Publication Release Date: Oct 31 2008
- 19 -
Revision 1.2
6.4
SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION
The ISD5008 product operates from a SPI serial interface, which operates with the following protocol:
The data transfer protocol assumes that the microcontroller’s SPI shift registers are clocked on the
falling edge of the SCLK. However, for the ISD5008, data is clocked into the MOSI pin at the rising
clock edge, while data is clocked out onto the MISO pin at the falling clock edge.
1. All serial data transfers begin with the falling edge of SS pin.
2. SS is held LOW during all serial communications and held HIGH between instructions.
3. Data is clocked in on the rising clock edge and data is clocked out on the falling clock edge.
4. Play and Record operations are initiated by enabling the device by asserting the SS pin LOW,
shifting in an opcode and an address field to the ISD5008 device (refer to the Opcode
Summary of Table 6).
5. The opcodes and address fields are as follows: <8 control bits> and <16 address bits>.
6. Each operation that ends in an EOM or Overflow will generate an interrupt, including the
Message Cueing cycles. The Interrupt will be cleared the next time an SPI cycle is completed.
7. As Interrupt data is shifted out of the ISD5008 MISO pin, control and address data is
simultaneously being shifted into the MOSI pin. Care should be taken such that the data
shifted in is compatible with current system operation. It is possible to read interrupt data and
start a new operation within the same SPI cycle.
8. A record or playback operation begins with the RUN bit set and the operation ends with the
RUN bit reset.
9. All operations begin with the rising edge of SS.
6.4.1
Message Cuing
Message cueing allows the user to skip through messages, without knowing the actual physical
location of the message. This operation is used during playback. In this mode, the messages are
skipped 1600 times faster than in normal playback mode. It will stop when an EOM marker is reached.
Then, the internal address counter will point to the next message.
相關(guān)PDF資料
PDF描述
VE-J2L-IY-B1 CONVERTER MOD DC/DC 28V 50W
VE-J2K-IY-B1 CONVERTER MOD DC/DC 40V 50W
VI-23X-IX-F3 CONVERTER MOD DC/DC 5.2V 75W
VE-J2J-IY-B1 CONVERTER MOD DC/DC 36V 50W
VE-J2H-IY-B1 CONVERTER MOD DC/DC 52V 50W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISD5008SYI 功能描述:IC VOICE REC/PLAY 4-8MIN 28-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
ISD5008X 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP VOICE RECORD PLAYBACK DEVICE 4-, 5-, 6-, AND 8- MINUTE DURATIONS
ISD5008Z 功能描述:IC VOICE REC/PL 4-8MIN CSP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
ISD5008ZD 功能描述:IC VOICE REC/PL 4-8MIN EX CSP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
ISD5008ZDR 功能描述:IC VOICE REC/PL 4-8MIN EX CSP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000