參數(shù)資料
型號(hào): IRU3046
廠商: International Rectifier
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: DUAL SYNCHRONOUS PWM CONTROLLER WITH CURRENT SHARING CIRCUITRY AND LDO CONTROLLER
中文描述: 雙同步PWM控制器,帶有均流電路和LDO控制器
文件頁數(shù): 12/20頁
文件大?。?/td> 163K
代理商: IRU3046
12
Rev. 1.9
09/27/02
IRU3046
www.irf.com
From (18), R
2
can be express as:
Set the zero of compensator to be half of F
LC(SLAVE)
, the
compensator capacitor, C
2
, can be calculated as:
Using equations (20) and (21) we get the following val-
ues for R
2
and C
2
.
LDO Section
Output Voltage Programming
Output voltage for LDO is programmed by reference volt-
age and external voltage divider. The Fb3 pin is the in-
verting input of the error amplifier, which is internally ref-
erenced to 1.25V. The divider is ratioed to provide 1.25V
at the Fb3 pin when the output is at its desired value.
The output voltage is defined by using the following equa-
tion:
R
7
R
10
For:
V
OUT2
= 2.5V
V
REF
= 1.25V
R
10
= 1K
Results to R
7
=1K
C
2
=6606pF; Choose: C
2
=6800pF
R
2
=16.45K; Choose: R
2
=16.5K
LDO Power MOSFET Selection
The first step in selecting the power MOSFET for the
linear regulator is to select the maximum R
DS(ON)
based
on the input to the dropout voltage and the maximum
load current.
R
DS(ON)
=V
IN3
- V
OUT2
I
OUT2
For:
V
IN3
= 3.3V
V
OUT2
= 2.5V
I
OUT2
= 2A
Results to: R
DS(ON)(MAX)
= 0.4
Note that since the MOSFET R
DS(ON)
increases with tem-
perature, this number must be divided by ~1.5 in order
to find the R
DS(ON)(MAX)
at room temperature. The IRLR2703
has a maximum of 0.065
R
DS(ON)
at room temperature,
which meets our requirements.
Layout Consideration
The layout is very important when designing high fre-
quency switching converters. Layout will affect noise
pickup and can cause a good design to perform with
less than expected results.
Start to place the power components, make all the con-
nection in the top layer with wide, copper filled areas.
The inductor, output capacitor and the MOSFET should
be close to each other as possible. This helps to reduce
the EMI radiated by the power traces due to the high
switching currents through them. Place input capacitor
directly to the drain of the high-side MOSFET, to reduce
the ESR replace the single input capacitor with two par-
allel units. The feedback part of the system should be
kept away from the inductor and other noise sources,
and be placed close to the IC. In multilayer PCB use
one layer as power ground plane and have a control cir-
cuit ground (analog ground), to which all signals are ref-
erenced. The goal is to localize the high current path to
a separate loop that does not interfere with the more
sensitive analog control function. These two grounds
must be connected together on the PC board layout at a
single point.
R
2
= 1
×
m
×
R
S1
2
π ×
F
O2
×
L
2
×
V
OSC
V
IN(SLAVE)
- V
OUT
---(20)
V
OUT2
= V
REF
×
1+
( )
H(Fo) =
g
m
×
R
S1
×
R
2
×
V
2
π×
Fo
×
L
2
×
V
OSC
IN
- V
OUT
F
LC(SLAVE)
=
1
2
π
L
2
×
C
OUT
Fz =F
LC(SLAVE)
2
C
2
= 1
2
π
×
R
2
×
Fz
Fb3
IRU3046
V
OUT3
R
10
R
7
Figure 9 - Programming the output voltage for LDO.
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