參數(shù)資料
型號(hào): IRS2336DSTRPBF
廠(chǎng)商: International Rectifier
英文描述: HIGH VOLTAGE 3 PHASE GATE DRIVER IC
中文描述: 3相高壓柵極驅(qū)動(dòng)器集成電路
文件頁(yè)數(shù): 21/45頁(yè)
文件大?。?/td> 952K
代理商: IRS2336DSTRPBF
IRS2336xD Family
www.irf.com
2007 International Rectifier
21
HINx
LINx
50%
50%
50%
50%
DT
DT
HOx
LOx
Figure 7: Illustration of deadtime
Matched Propagation Delays
The IRS2336xD family of HVICs is designed with propagation delay matching circuitry. With this feature, the IC’s
response at the output to a signal at the input requires approximately the same time duration (i.e., t
ON
, t
OFF
) for both
the low-side channels and the high-side channels; the maximum difference is specified by the delay matching
parameter (MT). Additionally, the propagation delay for each low-side channel is matched when compared to the
other low-side channels and the propagation delays of the high-side channels are matched with each other; the MT
specification applies as well. The propagation turn-on delay (t
ON
) of the IRS2336xD is matched to the propagation
turn-on delay (t
OFF
).
Input Logic Compatibility
The inputs of this IC are compatible with standard CMOS and TTL outputs. The IRS2336xD family has been
designed to be compatible with 3.3 V and 5 V logic-level signals. The IRS2336D features an integrated 5.2 V Zener
clamp on the HIN, LIN, ITRIP, and EN pins; the IRS23364D does not offer this input clamp. Figure 8 illustrates an
input signal to the IRS2336D and IRS23364D, its input threshold values, and the logic state of the IC as a result of
the input signal.
Figure 8: HIN & LIN input thresholds
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