參數(shù)資料
型號: IRMCF343
廠商: International Rectifier
英文描述: Sensorless Motor Control IC for Appliances
中文描述: 無傳感器電機控制集成電路設(shè)備
文件頁數(shù): 10/34頁
文件大?。?/td> 757K
代理商: IRMCF343
IRMCF343
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
10
PWMWL
PFCPWM
Output, PWM phase W low side gate signal
Output, PFC PWM gate signal
Fault
GATEKILL
Input, upon assertion, this negates all six PWM signals, programmable
logic sense
P5.0/PFCGKILL Input, upon assertion, this negates PFCPWM signal, programmable logic
sense, can be configured as discrete I/O in which case CGATEKILL
negates PFCPWM
4.3
Analog Interface Group
AVDD
AVSS
CMEXT
Analog power (1.8V)
Analog power return
Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be
connected.
0.6V buffered output
Input, Operational amplifier positive input for shunt resistor current
sensing
Input, Operational amplifier negative input for shunt resistor current
sensing
Output, Operational amplifier output for shunt resistor current sensing
Input, Operational amplifier positive input for PFC current sensing
Input, Operational amplifier negative input for PFC current sensing
Output, Operational amplifier output for PFC current sensing
Input, Operational amplifier positive input for PFC AC voltage sensing
Input, Operational amplifier negative input for PFC AC voltage sensing
Output, Operational amplifier output for PFC AC voltage sensing
Input, Analog input channel 0 (0 – 1.2V), typically configured for DC bus
voltage input
Input, analog input channel 1 (0 – 1.2V), needs to be pulled down to
AVSS if unused
AREF
IFB+
IFB-
IFBO
IPFC+
IPFC-
IPFO
VAC+
VAC-
VACO
AIN0
AIN1
4.4
Power Interface Group
VDD1
VDD2
VSS
PLLVDD
PLLVSS
Digital power for I/O (3.3V)
Digital power for core logic (1.8V)
Digital common
PLL power (1.8V)
PLL ground return
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