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| 型號： | IP178CLF |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8 Port 10/100 Ethernet Integrated Switch |
| 中文描述： | 8端口10/100以太網(wǎng)集成開關(guān) |
| 文件頁數(shù)： | 15/91頁 |
| 文件大小： | 1244K |
| 代理商： | IP178CLF |
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IP178C
Preliminary Data Sheet
Pin description
(continued)
Pin No.
Misc.
36
Label
Type
Description
NC
(FXSD6)
OSCI
(for IP178CH only)
25Mhz system clock
It is recommended to connect OSCI and X2 to a 25M crystal.
If the clock source is from another chip or oscillator, the clock
should be active at least for 1ms before pin 64 RESETB
de-asserted.
Pin 55 X2 should be left open in this application.
Crystal pin
A 25Mhz crystal can be connected to OSCI and X2.
Reset
It is low active. It must be hold for more than 1ms. It is Schmitt
trigger input. If a R/C reset circuit is used, the capacitor should
be connected to VCC_O as shown in the figure.
54
I
55
X2
O
64
RESETB
I
VCC_O
GND
R
RESETB
C
84
LOW_10M_DIS
Or
SCA_DIS
IPH2 LOW_10M_DIS or SCA_DIS
If pin 73 SEL_SCA is pull low, then pin 84 is LOW_10M_DIS.
If pin 73 SEL_SCA is pull high, then pin 84 is SCA_DIS.
For LOW_10M_DIS
1: disable power saving mode, the 10M transmit amplitude is
depressed in this mode. (default)
0: enable power saving mode
For SCA_DIS
1: Disable smart cable analysis function (default).
0: Enable smart cable analysis function.
EEPROM
104
SCL
IPL2
/O
Clock of EEPROM
After reset, it is used as clock pin SCL of EEPROM. After
reading EEPROM, this pin becomes an input pin. Its period is
longer than 10us.
IP178C stops reading the rest data in EEPROM if the first two
bytes in EEPROM aren’t 55AA.
Copyright
2004, IC Plus Corp.
15/91
October 27, 2005
IP178C-DS-R09
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