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參數(shù)資料
| 型號(hào)： | INT201PFI |
| 廠商： | POWER INTEGRATIONS INC |
| 元件分類(lèi)： | 功率晶體管 |
| 英文描述： | Floating Inputs Floating High-side Drive |
| 中文描述： | 0.3 A BUF OR INV BASED MOSFET DRIVER, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大?。?/td> | 100K |
| 代理商： | INT201PFI |
INT201
F
2/96
2
Pin Functional Description
Pin 1:
No connection.
Pin 2:
No connection.
Pin 3:
Level shift input
HSD 1
works in
conjunction with HSD 2 to provide
interface from the low side control logic
and to give noise immunity.
Pin 4:
Level shift input
HSD 2
works in
conjunction with HSD 1 to provide
interface from the low side control logic
and to give noise immunity.
Pin 5:
SOURCE
connection. Analog reference
point for the circuit, normally connected
to the source of the high side MOSFET.
Pin 6:
HS OUT
is the output of the MOSFET
driver for the high side.
Pin 7:
No connection.
Pin 8:
V
supplies power to the control logic
and output driver.
INT201 Functional Description
5 V Regulator
The 5 V linear regulator circuit provides
the supply voltage for the noise rejection
circuitry and control logic. This allows
the logic section and the driver circuitry
to be directly compatible with 5 V CMOS
logic without the need of an external 5 V
supply.
Undervoltage Lockout
The undervoltage lockout circuit disables
the HS OUT pin whenever the V
power supply falls below 9.0 V, and
maintains this condition until the V
power supply rises above 9.35 V. This
guarantees that the high side MOSFET
will be off during power-up or fault
conditions.
Noise Immunization Circuit
This circuit provides noise immunity by
combining a sampling circuit with a
flip-flop to turn on and off the driver
only when required to and not when
there is noise on the HSD inputs.
Driver
The CMOS driver circuit provides drive
power to the gate of the MOSFET used
on the high side of the half bridge circuit.
The driver consists of a CMOS buffer
capable of driving external transistors at
up to 15 V. The SOURCE pin is
connected to the source of the external
MOSFET to establish a reference for the
gate voltage.
Figure 3. Functional Block Diagram of the INT201.
HSD1
HSD2
VDDH
SOURCE
PI-514B-021792
HS OUT
LINEAR
REGULATOR
UV
LOCKOUT
DISCRIMINATOR
DELAY
R
Q
S
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| INT201TFI | Floating Inputs Floating High-side Drive |
| INT202 | Low-side Drive and High-side Control for Simultaneous Conduction |
| INT202PFI1 | Low-side Drive and High-side Control for Simultaneous Conduction |
| INT202PFI2 | Low-side Drive and High-side Control for Simultaneous Conduction |
| INT202TFI1 | Low-side Drive and High-side Control for Simultaneous Conduction |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| INT201PFI1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| INT201TFI | 制造商:POWERINT 制造商全稱:Power Integrations, Inc. 功能描述:High-side Driver IC |
| INT201TFI1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| INT202 | 制造商:POWERINT 制造商全稱:Power Integrations, Inc. 功能描述:Low-side Drive and High-side Control for Simultaneous Conduction |
| INT202PFI1 | 制造商:POWERINT 制造商全稱:Power Integrations, Inc. 功能描述:Low-side Drive and High-side Control for Simultaneous Conduction |
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