- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4578 > IDT88P8344BHGI (IDT, Integrated Device Technology Inc)IC SPI3-SPI4 EXCHANGE 820-PBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | IDT88P8344BHGI |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 26/98頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 系列： | * |
| 其它名稱： | 88P8344BHGI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁
32
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
SPI-4 ingress to SPI-3 egress flow control
The SPI-4 control information is transmitted to the adjacent device. The
adjacent device determines which LP to service next according to the status
information it receives from the IDT88P8344. The SPI-4 ingress data arrive in
bursts that are of equal length except for the last burst of a packet which may
be shorter.
The SPI-4 burst data is transferred to the per LID allocated buffer segments.
The addition of the data may cause an update of the SPI-4 status information
(starving,hungry,satisfied),andmaychangetheSPI-3STPA,DTPA,orPTPA
signals when in PHY mode.
Forthecontrolinformationtherearetwoseparatecasestoconsider:thecase
thattheSPI-3isconfiguredtoLinkmode,andthecasethattheSPI-3isconfigured
to PHY mode. Note that since the SPI-3 physical interfaces are configured
separately, the IDT88P8344 device is able to deal with the case that some of
the LP fragments are to be transmitted on a Link SPI-3 interface and some are
to be transmitted on a PHY SPI-3 interface
When in PHY mode, the data is sent according the availability of the data in
the buffer segment pool. In the Link mode an extra consideration is taken to
account – that of the fill level of the ingress FIFOs in the adjacent device.
Backpressure threshold
- Number of free segments allocated to trigger backpressure for the LP
The diagram below shows the SPI-4 to SPI-3 flow control path through the
IDT88P8344 device.
Figure 20. SPI-4 ingress to SPI-3 egress flow control
…
JTAG
uproc
LID Counters Memory
4 x SPI-3
8 bit / 32 bit
Min: 19.44MHz
Max: 133MHz
Interface
Bloc
k
Chip Counters Memory
Interface
Bloc
k
SPI-3 /
LID map
Main
Memory
A
SPI-4.2
Min: 80 MHz
Max:400 MHz
SPI-4 /
LID map
6370 drw13a
STATUS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ESM44DRAS | CONN EDGECARD 88POS R/A .156 SLD |
| ASM28DSAS | CONN EDGECARD 56POS R/A .156 SLD |
| ESC60DRTN-S93 | CONN EDGECARD 120PS DIP .100 SLD |
| ESC60DRTH-S93 | CONN EDGECARD 120PS DIP .100 SLD |
| MIC5232-3.3YML TR | IC REG LDO 3.3V 10MA 6-MLF |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT88P8344BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT89H10T4BG2ZBBC | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBC8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBCG | 功能描述:IC PCI SW 10LANE 4PORT 324BGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:PRECISE™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT89H10T4BG2ZBBCG8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。