參數(shù)資料
型號: IDT88P8341BHI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 16/96頁
文件大?。?/td> 0K
描述: IC SPI3-SPI4 EXCHANGE 820-PBGA
標準包裝: 24
系列: *
其它名稱: 88P8341BHI
23
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
4. DATAPATH AND FLOW CONTROL
The following sections describe the datapaths through the device. The
datapaths shown are as follows:
- SPI-3A <-> SPI-4
- SPI-3A <-> microprocessor interface
- SPI-4 <-> microprocessor interface
Where <-> indicates a bidirectional data path.
TheIDT88P8341supportsoneSPI-3interfaceandoneSPI-4interface.The
SPI-3interfacecanoperateinaPHYorLinkmode.RefertoFigure11, Definition
of Data Flows for the main data flows in the device. Logical data flows are
transported over the physical ports. The logical flows are identified by logical
port addresses on the physical port and by a Link identification (LID) map in the
core of the IDT88P8341.
DATA BUFFER ALLOCATION
Flexibilityhasbeenprovidedtotheuserfordatabufferallocation.Thedevice
has 128 KByte of on chip memory per direction – a total of 256 KByte of on-chip
data memory.
The 128 KByte SPI-3 buffers are divided into 256 byte segments. The
segments are controlled by a packet fragment processor. The user configures
the maximum number of segments per LP to allocate to a port and the number
ofsegmentsallocatedfromthebuffersegmentpoolthatwilltriggertheflowcontrol
mechanism.Thereisnolimitationonthereallocationoffreedsegmentsamong
logicalports,aswouldbepresentifthememoryhadbeenallocatedbyasimple
addressmechanism.
Figure 11. Definition of data flows
6372 drw12
SPI-3 physical port
SPI-4
to SPI-3
from SPI-3
to SPI-4
from SPI-4
SPI-3 egress
SPI-3 ingress
SPI-4 ingress
SPI-4 egress
SPI-3-4 path
SPI-4-3 path
physical
port
SPI-3 extract
SPI-3 insert
SPI-4 insert
SPI-4 extract
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