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參數(shù)資料
| 型號： | IDT82V2081PPG8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 17/68頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU T1/J1/E1 1CH 44-TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,250 |
| 類型： | 線路接口裝置（LIU） |
| 規(guī)程： | T1/E1/J1 |
| 電源電壓： | 3.13 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 82V2081PPG8 |
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24
INDUSTRIAL
TEMPERATURE RANGES
SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
3.6
LOS AND AIS DETECTION
3.6.1
LOS DETECTION
The Loss of Signal Detector monitors the amplitude of the incoming sig-
nal level and pulse density of the received signal on RTIP and RRING.
LOS declare (LOS=1)
A LOS is detected when the incoming signal has “no transitions”, i.e.,
when the signal level is less than Q dB below nominal for N consecutive
pulse intervals. Here N is defined by LAC bit (MAINT0, 0DH). LOS will be
declared by pulling LOS pin to high (LOS=1) and LOS interrupt will be gen-
erated if it is not masked.
LOS clear (LOS=0)
The LOS is cleared when the incoming signal has “transitions”, i.e.,
when the signal level is greater than P dB below nominal and has an aver-
age pulse density of at least 12.5% for M consecutive pulse intervals, start-
ing with the receipt of a pulse. Here M is defined by LAC bit (MAINT0, 0DH).
LOS status is cleared by pulling LOS pin to low.
Figure-12 LOS Declare and Clear
LOS detect level threshold
In short haul mode, the amplitude threshold Q is fixed on 800 mVpp,
while P=Q+200 mVpp (200 mVpp is the LOS level detect hysteresis).
Inlonghaulmode,thevalueofQcanbeselectedbyLOS[4:0] bit(RCF1,
0BH), while P=Q+4 dB (4 dB is the LOS level detect hysteresis). The
LOS[4:0] default value is 10101 (-46 dB).
When the chip is configured by hardware, the LOS detect level is fixed
if the IDT82V2081 operates in long haul mode. It is -46dB (E1) and -38dB
(T1/J1).
Criteria for declare and clear of a LOS detect
The detection supports the ANSI T1.231 and I.431 for T1/J1 mode and
G.775 and ETSI 300233/I.431 for E1 mode. The criteria can be selected
by LAC bit (MAINT0, 0DH) and T1E1 bit (GCF, 02H).
both short haul and long haul application.
All Ones output during LOS
On the system side, the RDP/RDN will reflect the input pulse “transition”
at the RTIP/RRING side and output recovered clock (but the quality of the
output clock can not be guaranteed when the input level is lower than the
maximum receive sensitivity) when AISE bit (MAINT0, 0DH) is 0; or output
All Ones as AIS when AISE bit (MAINT0, 0DH) is 1. In this case, RCLK out-
put is replaced by MCLK.
Onthelineside,theTTIP/TRINGwilloutputAllOnesasAISwhenATAO
bit (MAINT0, 0DH) is 1. The All Ones pattern uses MCLK as the reference
clock.
LOS indicator is always active for all kinds of loopback modes.
signal level<Q
(observing windows= N)
(observing windows= M)
signal level>P
density=OK
LOS=1
LOS=0
Table-17 LOS Declare and Clear Criteria for Short Haul Mode
Control bit
LOS declare threshold
LOS clear threshold
T1E1
LAC
1=T1/J1
0=T1.231
Level < 800 mVpp
N=175 bits
Level > 1 Vpp
M=128 bits
12.5% mark density
<100 consecutive zeroes
1=I.431
Level < 800 mVpp
N=1544 bits
Level > 1 Vpp
M=128 bits
12.5% mark density
<100 consecutive zeroes
0=E1
0=G.775
Level < 800 mVpp
N=32 bits
Level > 1 Vpp
M=32 bits
12.5% mark density
<16 consecutive zeroes
1=I.431/ETSI
Level < 800 mVpp
N=2048 bits
Level > 1 Vpp
M=32 bits
12.5% mark density
<16 consecutive zeroes
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82V2082 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:DUAL CHANNEL T1/E1/J1 LONG HAUL/ SHORT HAUL LINE INTERFACE UNIT |
| IDT82V2082_09 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:DUAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT |
| IDT82V2082BFBLANK | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:DUAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT |
| IDT82V2082BFG | 功能描述:IC LIU T1/E1/J1 2CH 81BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| IDT82V2082BFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 2CH 81BGA |
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