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| 型號： | IDT79RC32T332-100DHI |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 28/30頁 |
| 文件大小： | 0K |
| 描述： | IC MPU 32BIT CORE 100MHZ 208-QFP |
| 產(chǎn)品變化通告： | Product Discontinuation 07/Dec/2009 |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 系列： | Interprise™ |
| 處理器類型： | RISC 32-位 |
| 速度： | 100MHz |
| 電壓： | 2.5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 208-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 208-PQFP（28x28） |
| 包裝： | 托盤 |
| 其它名稱： | 79RC32T332-100DHI |
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7 of 30
May 4, 2004
IDT 79RC32332
pci_req_n[2]
Input
Z
—
PCI Bus Request #2 Negated Requires an external pull-up.
Host mode: pci_req_n[2] is an input indicating a request from an external device.
Satellite mode: used as pci_idsel pin which selects this device during a configuration read or write.
Alternate function: pci_idsel (satellite).
pci_req_n[0]
I/O
Z
High
PCI Bus Request #0 Negated Requires an external pull-up for burst mode.
Host mode: pci_req_n[0] is an input indicating a request from an external device.
Satellite mode: pci_req_n[0] is an output indicating a request from this device.
pci_gnt_n[2]
Output
Z1
High
PCI Bus Grant #2 Negated Recommend an external pull-up.
Host mode: pci_gnt_n[2] is an output indicating a grant to an external device.
Satellite mode: pci_gnt_n[2] is used as the pci_inta_n output pin. External pull-up is required.
Alternate function: pci_inta_n (satellite).
pci_gnt_n[1]
(can only be used as
alternate function)
I/O
X for 1 pci
clock then
H2
High
PCI Bus Grant #1 Negated Recommend external pull-up.
Host mode: not used as pci_gnt_n[1]. Must be used as alternate function PIO[7].
Satellite mode: Not used as pci_gnt_n[1]. Used as pci_eprom_cs output pin for Serial Chip Select for
loading PCI Configuration Registers in the RC32332 Reset Initialization Vector PCI boot mode. Defaults
to the output direction at reset time.
1st Alternate function: pci_eeprom_cs (satellite).
2nd Alternate function: PIO[7].
pci_gnt_n[0]
I/O
Z
High
PCI Bus Grant #0 Negated
Host mode: pci_gnt_n[0] is an output indicating a grant to an external device. Recommend external pull-
up.
Satellite mode: pci_gnt_n[0] is an input indicating a grant to this device. Requires external pull-up.
pci_inta_n
Output
Open-
collec-
tor
ZPCI
PCI Interrupt #A Negated
Uses pci_gnt_n[2]. See the PCI subsection.
pci_lock_n
Input
—
PCI Lock Negated
Driven by the Bus Master to indicate that an exclusive operation is occurring.
1 Z in host mode; L in satellite non-boot mode; Z in satellite boot mode.
2 H in host mode, L in satellite non-boot and boot modes. X = unknown.
SDRAM Control Interface
sdram_addr_12
Output
L
High
SDRAM Address Bit 12 and Precharge All
SDRAM mode: Provides SDRAM address bit 12 (10 on the SDRAM chip) during row address and "pre-
charge all" signal during refresh, read and write command.
sdram_ras_n
Output
H
High
SDRAM RAS Negated
SDRAM mode: Provides SDRAM RAS control signal to all SDRAM banks.
sdram_cas_n
Output
H
High
SDRAM CAS Negated
SDRAM mode: Provides SDRAM CAS control signal to all SDRAM banks.
sdram_we_n
Output
H
High
SDRAM WE Negated
SDRAM mode: Provides SDRAM WE control signal to all SDRAM banks.
sdram_cke
Output
H
High
SDRAM Clock Enable
SDRAM mode: Provides clock enable to all SDRAM banks.
sdram_cs_n[3:0]
Output
H
High
SDRAM Chip Select Negated Bus Recommend an external pull-up.
SDRAM mode: Provides chip select to each SDRAM bank.
SODIMM mode: Provides upper select byte enables [7:4].
sdram_s_n[1:0]
Output
H
High
SDRAM SODIMM Select Negated Bus
SDRAM mode: Not used.
SDRAM SODIMM mode: Upper and lower chip selects.
Name
Type
Reset
State
Status
Drive
Strength
Capability
Description
Table 1 Pin Descriptions (Part 3 of 6)
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