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參數(shù)資料
| 型號： | IDT74LVCH2574ASO |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 63K |
| 代理商： | IDT74LVCH2574ASO |
1
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74LVCH2574A
3.3VCMOSOCTALEDGE-TRIGGEREDD-TYPEFLIP-FLOP
OE
C1
CLK
1
D
TO SEVEN OTHER CHANNELS
1
11
2
19
1
D
1
Q
NO
T RECOMMENDED
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FEBRUARY 2000
1999
Integrated Device Technology, Inc.
DSC-4941/-
c
IDT74LVCH2574A
EXTENDED COMMERCIAL TEMPERATURE RANGE
DESCRIPTION:
The LVCH2574A octal edge-triggered D-type flip-flop is built using
advanced dual-metal CMOS technology. The device features 3-state
FEATURES:
– 0.5 MICRON CMOS Technology
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 1.27mm pitch SOIC, 0.65mm pitch SSOP,
0.635mm pitch QSOP, 0.65mm pitch TSSOP packages
– Extended commercial range of – 40°C to +85°C
–VCC = 3.3V ±0.3V, Normal Range
–VCC = 2.3V to 3.6V, Extended Range
– CMOS power levels (0.4W typ. static)
– Rail-to-Rail output swing for increased noise margin
– All inputs, outputs and I/O are 5 Volt tolerant
– Supports hot insertion
3.3V CMOS OCTAL EDGE-
TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS, 5 VOLT
TOLERANT I/O AND BUS-HOLD
FUNCTIONAL BLOCK DIAGRAM
outputs designed specifically for driving highly capacitive or relatively low-
impedance loads. The LVCH2574A is particularly suitable for implementing
buffer registers, input-output (I/O) ports, bidirectional bus drivers, and
working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set
to the logic levels at the data (D) inputs.
Abufferedoutput-enable(OE)inputcanbeusedtoplacetheeightoutputs
in either a normal logic state (high or low logic levels) or a high-impedance
state. In the high-impedance state, the outputs neither load nor drive the bus
lines significantly. OEdoes not affect the internal operations of the flip-flops.
Old data can be retained or new data can be entered while the outputs are
in the high-impedance state.
The LVCH2574A has series resistors in the device output structure which
will significantly reduce line noise when used with light loads. This driver has
been developed to drive ±12mA at the designated thresholds.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
theuseofthisdeviceasatranslatorinamixed3.3V/5Vsystemenvironment.
The LVCH2574A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
Drive Features for LVCH2574A:
– Balanced Output Drivers:
±12mA
– Low switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
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