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參數(shù)資料
| 型號(hào)： | IDT74LVCH16721APF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | TVSOP-56 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 66K |
| 代理商： | IDT74LVCH16721APF8 |
INDUSTRIALTEMPERATURERANGE
IDT74LVCH16721A
3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
1
OCTOBER 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4936/1
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
IDT74LVCH16721A
DESCRIPTION:
This 20-bit flip-flop is built using advanced dual metal CMOS technology.
The 20 flip-flops of the LVCH16721A are edge-triggered D-type flip-flops
with qualified clock storage. On the positive transition of the clock (CLK)
input, the device provides true data at the Q outputs if the clock-enable
(CLKEN) input is low. If CLKEN is high, no data is stored.
A buffered output-enable (OE) input places the 20 outputs in either a
normal logic state (high or low) or a high-impedance state. In the high-
impedancestate,theoutputsneitherloadnordrivethebuslinessignificantly.
The high-impedance state and increased drive provide the capability to
drivebuslineswithouttheneedforinterfaceorpullupcomponents. OEdoes
not affect the internal operation of the flip-flops. Old data can be retained or
new data can be entered while the outputs are in the high-impedance state.
The LVCH16721A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16721A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 20-BIT FLIP-FLOP
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O
AND BUS-HOLD
CLK
OE
CLKEN
D1
1
56
29
55
CE
C1
1D
2
Q1
To 19 Other Channels
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT74LVCH16721APA | LVC/LCX/Z SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| IDT74LVCH16827APF8 | LVC/LCX/Z SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| IDT74LVCH2244APY | LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| IDT74LVCH2244AQ8 | LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| IDT74LVCH2245AQ | LVC/LCX/Z SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20 |
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