參數資料
型號: IDT74LVCH16245APAG
廠商: IDT, Integrated Device Technology Inc
文件頁數: 2/6頁
文件大?。?/td> 0K
描述: IC BUS TRSCVR 3-ST 16BIT 48TSSOP
標準包裝: 39
系列: 74LVCH
邏輯類型: 收發(fā)器,非反相
元件數: 2
每個元件的位元數: 8
輸出電流高,低: 24mA,24mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應商設備封裝: 48-TSSOP
包裝: 管件
產品目錄頁面: 1258 (CN2011-ZH PDF)
其它名稱: 74LVCH16245APAG
800-1685
800-1685-5
800-1685-ND
INDUSTRIALTEMPERATURERANGE
2
IDT74LVCH16245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
° C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
–50
mA
IOK
VI < 0 or VO < 0
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. As applicable to the device type.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
6.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
1
DIR
1
B1
GND
VCC
GND
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
40
41
42
43
44
45
46
47
48
1
B2
1
B3
1
B4
1
B5
1
B6
1
B7
1
B8
2
B1
2
B2
GND
2
B3
2
B4
2
B6
2
B5
VCC
GND
2
B8
2
B7
2
DIR
1
OE
1
A1
GND
VCC
GND
1
A2
1
A3
1
A4
1
A5
1
A6
1
A7
1
A8
2
A1
2
A2
GND
2
A3
2
A4
2
A6
2
A5
VCC
GND
2
A8
2
A7
2
OE
Pin Names
Description
x
OE
Output Enable Inputs (Active LOW)
xDIR
Direction Control Input
x A x
Side A Inputs or 3-State Outputs(1)
x B x
Side B Inputs or 3-State Outputs(1)
PIN DESCRIPTION
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Inputs
x
OE
xDIR
Outputs
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
H
X
Isolation
FUNCTION TABLE (EACH8-BITSECTION)(1)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
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