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參數(shù)資料
| 型號： | IDT29FCT520BTQ8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | 8-BIT, DSP-PIPELINE REGISTER, PDSO24 |
| 封裝： | QSOP-24 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 65K |
| 代理商： | IDT29FCT520BTQ8 |
INDUSTRIALTEMPERATURERANGE
IDT29FCT520AT/BT/CT
MULTILEVELPIPELINEREGISTER
5
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
29FCT520AT
29FCT520BT
29FCT520CT
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPHL
PropagationDelay
CL = 50pF
2
14
2
7.5
2
6
ns
tPLH
CLK to Yx
RL = 500
Ω
tPHL
PropagationDelay
CL = 50pF
2
13
2
7.5
2
6
ns
tPLH
S0 or S1 to Yx
tSU
Set-up Time, HIGH or LOW
5
—
2.5
—
2.5
—
ns
Dx to CLK
t H
Hold Time, HIGH or LOW
2
—
2
—
2
—
ns
Dx to CLK
tSU
Set-up Time, HIGH or LOW
5
—
4
—
4
—
ns
I0 or I1 to CLK
tH
Hold Time, HIGH or LOW
2
—
2
—
2
—
ns
I0 or I1 to CLK
tPHZ
OutputDisableTime
1.5
12
1.5
7
1.5
6
ns
tPLZ
tPZH
OutputEnableTime
1.5
15
1.5
7.5
1.5
6
ns
tPZL
tW
Clock Pulse Width HIGH or LOW
7
—
5.5
—
5.5
—
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT29FCT520CTQ | 8-BIT, DSP-PIPELINE REGISTER, PDSO24 |
| IDT29FCT520ATSO | 8-BIT, DSP-PIPELINE REGISTER, PDSO24 |
| IDT29FCT52BTSO | FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| IDT29FCT52CTPY8 | FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| IDT29FCT52DTSO8 | FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT29FCT520BTSO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Pipeline Register |
| IDT29FCT520C | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:MULTILEVEL PIPELINE REGISTER |
| IDT29FCT520CD | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:MULTILEVEL PIPELINE REGISTER |
| IDT29FCT520CDB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:MULTILEVEL PIPELINE REGISTER |
| IDT29FCT520CE | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:MULTILEVEL PIPELINE REGISTER |
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