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參數(shù)資料
| 型號(hào)： | ICS9147-09 |
| 英文描述： | Frequency Generator & Integrated Buffers for 686 Series CPUs |
| 中文描述： | 頻率發(fā)生器 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 442K |
| 代理商： | ICS9147-09 |
4
ICS9147-01
BUSSTOP# is an asynchronous input to the ICS9147-01. It is used to turn off the BUS (1:6) clocks for low power operation.
BUSSTOP# is synchronized by the ICS9147-01 internally. BUS (1:6) clocks are stopped in a low state and started with
a full high pulse width guaranteed. BUS (1:6) clock on latency cycles are less than 4 CPU clocks and BUS (1:6) clock off
latency is less than 4 clocks.
(Drawing shown on next page.)
Notes:
1. All timing is referenced to the internal CPU clock.
2. CPUSTOP# is an asynchronous input and metastable conditions
may exist. This signal is synchronized to the CPU and SDRAM
clocks inside the ICS9147-01.
3. All other clocks continue to run undisturbed.
4. PD# and BUSSTOP# are shown in a high (true) state.
CPUSTOP# Timing Diagram
CPUSTOP# is an asychronous input to the clock synthesizer. It is used to turn off the CPU clocks for low power operation.
CPUSTOP# is synchronized by the
ICS9147-01
. All other clocks will continue to run while the CPU and SDRAM clocks
are disabled. The CPU and SDRAM clocks will always be stopped in a low state and start in such a manner that guarantees
the high pulse width is a full pulse. CPU clock on latency is 0 to 1 CPU clocks and CPU clock off latency is 0 to 1 CPU
clocks.
BUSSTOP# Timing Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS9147-12 | Low-Power High-Performance Impact<TM> PAL<R> Circuits 24-PDIP 0 to 75 |
| ICS9147-14 | High-Performance Impact-X<TM> PAL<R> Circuits 28-PLCC 0 to 75 |
| ICS9147-16 | High-Performance Impact-X<TM> PAL<R> Circuits 24-PDIP 0 to 75 |
| ICS9147-22 | High-Performance Impact-X<TM> PAL(R) Circuits 28-PLCC 0 to 75 |
| ICS9147F-03 | Frequency Generator & Integrated Buffers for 686 Series CPUs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS9147-12 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Pentium/ProTM System and Cyrix? Clock Chip |
| ICS9147-14 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9147-16 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Frequency Generator & Integrated Buffers for PENTIUMTM |
| ICS9147-22 | 制造商:ICS 制造商全稱:ICS 功能描述:Pentium/ProTM System and Cyrix™ Clock Chip |
| ICS9147F-01 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUMTM |
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