參數(shù)資料
型號(hào): ICS843253AGI-45LFT
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 2/15頁(yè)
文件大小: 0K
描述: IC SYNTHESIZER LVPECL 16-TSSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: HiPerClockS™, FemtoClock™
類(lèi)型: 頻率合成器
PLL: 帶旁路
輸入: 晶體
輸出: LVCMOS,LVPECL,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 1:3
差分 - 輸入:輸出: 無(wú)/是
頻率 - 最大: 156.25MHz
除法器/乘法器: 是/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
其它名稱(chēng): 843253AGI-45LFT
ICS843253I-45
FEMTOCLOCK CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS843253AGI-45 REVISION A JULY 20, 2009
10
2009 Integrated Device Technology, Inc.
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS843253I-45.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS843253I-45 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 66mA = 228.7mW
Power (LVPECL outputs)MAX = 30mW/Loaded Output pair
Power (LVPECL output) = 2 * 30mW = 60mW
LVCMOS Output Power Dissipation
Output Impedance ROUT Power Dissipation due to Loading 50 to VDDO/2
Output Current IOUT = VDDO_MAX / [2 * (50 + ROUT)] = 3.465V / [2 * (50 + 20)] = 24.75mA
Power Dissipation on the ROUT per LVCMOS output
Power (ROUT) = ROUT * (IOUT)
2 = 20
* (24.75mA)2 = 12.25mW per output
Total Power Dissipation
Total Power
= Power (core) + Power (LVPECL output) + Power (ROUT)
= 228.7mW + 60mW + 12.25mW = 301.2mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 92.4°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.301W * 92.4°C/W = 112.8°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board.
Table 7. Thermal Resistance θJA for 16 Lead TSSOP, Forced Convection
θ
JA by Velocity
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
92.4°C/W
88.0°C/W
85.9°C/W
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