FEMTOCLOCK
參數(shù)資料
型號: ICS843051AGLF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 4/17頁
文件大小: 0K
描述: IC CLK GEN GIG ETH LVPECL 8TSSOP
特色產(chǎn)品: Gigabit Ethernet Clock Synthesizer
標(biāo)準(zhǔn)包裝: 96
系列: HiPerClockS™, FemtoClock™
類型: 時鐘/頻率合成器,時鐘發(fā)生器
PLL:
輸入: 晶體
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 無/是
頻率 - 最大: 161.13MHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 8-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 1250 (CN2011-ZH PDF)
其它名稱: 800-1136
800-1136-5
800-1136-ND
843051AGLF
ICS843051AG REVISION A OCTOBER 13, 2010
12
2010 Integrated Device Technology, Inc.
ICS843051 Data Sheet
FEMTOCLOCK CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS843051.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS843051 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 85mA = 294.5mW
Power (outputs)MAX = 30mW/Loaded Output pair
Total Power_MAX (3.465V, with all outputs switching) = 294.5mW + 30mW = 324.5mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a moderate air
flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.324W * 90.5°C/W = 99.3°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resitance θJA for 8 Lead TSSOP, Forced Convection
θ
JA vs. Air Flow
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
89.8°C/W
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