![](http://datasheet.mmic.net.cn/IDT--Integrated-Device-Technology-Inc/ICS843004AGI-04LF_datasheet_101160/ICS843004AGI-04LF_9.png)
843004AGI-04
www.idt.com
REV. A JULY 26, 2010
9
ICS843004I-04
FEMTOCLOCKS CRYSTAL/LVCMOS-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
SCHEMATIC EXAMPLE
Figure 5 shows a schematic example for ICS843004I-
04. In this example, the input is a 19.44MHz parallel
resonant crystal with load capacitor CL=18pF. The 22pF
frequency fine tuning capacitors are used C1 and C2.
This example also shows general logic control input
FIGURE 5. ICS844004I-04 SCHEMATIC EXAMPLE
handling. For decoupling capacitors, it is recommended
to have one decouple capacitor per power pin.
Each
decoupling capacitor should be located as close as
possible to the power pin. The low pass filter R2, C3 and
C4 should also be located as close to the V
CCA pin as
possible.
To Logic
Input
pins
F_SEL3
+
-
U1
843004i-04
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
nQ
1
Q1
VC
C
O
Q0
nQ
0
MR
F
_
SEL3
NC
VC
C
A
F
_
SEL0
VC
C
F
_
SEL1
XT
AL_
O
U
T
XT
AL_
IN
VEE
CL
K
IN
PU
T
_
SEL
F
_
SEL
2
VEE
nQ
3
Q3
VC
C
O
Q2
nQ
2
VDD
C3
10uF
VCC
F_SEL0
VCCO=3.3V
C1
22pF
VCC
VCCA
Set Logic
Input to
'0'
C3
0.1uF
R3
133
+
-
Set Logic
Input to
'1'
Zo = 50 Ohm
Ro ~ 7 Ohm
Q1
Driv er_LVCMOS
INPUT_SEL
C2
0.1uF
1 8 p F
3.3V
RU1
1K
R6
82.5
Optional
Y-Termination
Zo = 50 Ohm
R5
50
C2
22pF
Zo = 50 Ohm
R2
10
RD1
Not Install
RD2
1K
F_SEL2
(U1-11)
MR
C1
0.1uF
VCCO
RU2
Not Install
(U1-22)
VCC
(U1-3)
Logic Control Input Examples
Zo = 50 Ohm
VCC
F_SEL1
R4
82.5
To Logic
Input
pins
VDD
R7
50
R5
133
X1
19.44MHz
VCC=3.3V
VCCO
C4
0.01u
R6
50
Zo = 50 Ohm
R8
43