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參數(shù)資料
| 型號： | ICS843001CGILFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 6/7頁 |
| 文件大小： | 0K |
| 描述： | IC CLK GEN FIBRE CH 8TSSOP |
| 標準包裝： | 2,500 |
| 系列： | HiPerClockS™, FemtoClock™ |
| 類型： | 頻率合成器 |
| PLL： | 是 |
| 輸入： | 晶體 |
| 輸出： | LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 212.5MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 8-TSSOP |
| 包裝： | 帶卷 (TR) |
6
ECL Pro
SY10EP11U
SY100EP11U
Micrel, Inc.
M9999-111605
hbwhelp@micrel.com or (408) 955-1690
TA = –40°CTA = +25°CTA = +85°C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
3055
—
3375
3055
—
3375
3055
—
3375
mV
(Single-Ended)
V
IH
Input HIGH Voltage
3775
—
4120
3775
—
4120
3775
—
4120
mV
(Single-Ended)
V
OL
Outuput LOW Voltage
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
50 to VCC–2V
V
OH
Output HIGH Voltage
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
50 to VCC–2V
V
IHCMR
Input HIGH Voltage(6)
2.0
—
V
CC
2.0
—
V
CC
2.0
—
V
CC
V
Common Mode Range
(100KEP) PECL DC ELECTRICAL CHARACTERISTICS(5)
VCC = 5.0V ±10%, VEE = 0V.
Notes:
5. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in
a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters are at V
CC =
5.0V. They vary 1:1 with V
CC.
6. The V
IHCMR range is referenced to the most positive side of the differential input signal. See “Input Waveform” section. Single-ended input CLK pin
operation is limited to V
CC ≥ 3.0V in PECL mode.
TA = –40°CTA = +25°CTA = +85°C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
–1945
—
–1625 –1945
—
–1625 –1945
—
–1625
mV
(Single-Ended)
V
IH
Input HIGH Voltage
–1225
—
–880
–1225
—
–880
–1225
—
–880
mV
(Single-Ended)
V
OL
Outuput LOW Voltage
–1945 –1820 –1695 –1945 –1820 –1695 –1945 –1820 –1695
mV
50 to VCC–2V
V
OH
Output HIGH Voltage
–1145 –1020
–895
–1145 –1020
–895
–1145 –1020
–895
mV
50 to VCC–2V
V
IHCMR
Input HIGH Voltage(8)
V
EE +1.2
0.0
V
EE +1.2
0.0
V
EE +1.2
0.0
V
Common Mode Range
(100KEP) ECL/LVECL DC ELECTRICAL CHARACTERISTICS(7)
VCC = 0V, VEE = –5.5V to –2.375V.
Notes:
7. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in
a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
8. The V
IHCMR range is referenced to the most positive side of the differential input signal. See “Input Waveform” section. Single-ended input CLK pin
operation is limited to V
EE ≤ –3.0V in ECL/LVECL mode.
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