IDT / ICS HCSL CLOCK GENERATOR 9 I" />
參數(shù)資料
型號(hào): ICS841654AGILFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 17/17頁
文件大?。?/td> 0K
描述: IC CLOCK GENERATOR 28-TSSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: HiPerClockS™, FemtoClock™
類型: 時(shí)鐘發(fā)生器,扇出配送,多路復(fù)用器
PLL: 帶旁路
輸入: LVCMOS,LVTTL,晶體
輸出: HCSL,LVCMOS,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 2:5
差分 - 輸入:輸出: 無/是
頻率 - 最大: 125MHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 帶卷 (TR)
其它名稱: 841654AGILFT
IDT / ICS HCSL CLOCK GENERATOR
9
ICS841654AGI REV. A APRIL 17, 2008
ICS841654I
FEMTOCLOCKS CRYSTAL-TO-HCSL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION, CONTINUED
SE MEASUREMENT POINTS FOR ABSOLUTE CROSS POINT/SWING
nQ
Q
VCROSS_MAX = 550mV
VCROSS_MIN = 250mV
VMAX = 1.15V
VMIN = -0.30V
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. To achieve optimum jitter per-
formance, power supply isolation is required. The ICS841654I
provides separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
DD, VDDA, VDDOA and
V
DDOB should be individually connected to the power supply
plane through vias, and 0.01F bypass capacitors should be
used for each pin.
Figure 1 illustrates this for a generic V
DD pin
and also shows that V
DDA requires
that an additional10
Ω
resistor along with a 10F bypass capacitor be connected to
the V
DDA pin.
POWER SUPPLY FILTERING TECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10
Ω
V
DDA
10
μF
.01
μF
3.3V
.01
μF
V
DD
INPUTS:
CRYSTAL INPUTS
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k
Ω resistor can be tied
from XTAL_IN to ground.
REF_IN INPUT
For applications not requiring the use of the reference clock,
it can be left floating. Though not required, but for additional
protection, a 1k
Ω resistor can be tied from the REF_IN to ground.
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
HCSL OUTPUTS
All unused HCSL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
LVCMOS OUTPUT
The unused LVCMOS output can be left floating. We recommend
that there is no trace attached.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS841654AGIT 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FEMTOCLOCKS? CRYSTAL-TO-HCSL CLOCK GENERATOR
ICS841654I 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FEMTOCLOCKS? CRYSTAL-TO-HCSL CLOCK GENERATOR
ICS841664AGILF 功能描述:IC CLOCK GENERATOR 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:HiPerClockS™, FemtoClock™ 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML,PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤,16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?(3x3) 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND
ICS841664AGILFT 功能描述:IC CLOCK GENERATOR 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:HiPerClockS™, FemtoClock™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器,扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP(8x8) 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT
ICS841664I 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FEMTOCLOCK? CRYSTAL-TO-HCSL CLOCK GENERATOR