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參數(shù)資料
| 型號(hào)： | ICS840004AGI-01 |
| 英文描述： | FEMTOCLOCKS⑩ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER |
| 中文描述： | FEMTOCLOCKS⑩晶體到的LVCMOS / LVTTL頻率合成器 |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大小： | 169K |
| 代理商： | ICS840004AGI-01 |
Integrated
Circuit
Systems, Inc.
840004AGI-01
www.icst.com/products/hiperclocks.html
REV. A JUNE 28, 2005
8
ICS840004I-01
F
EMTO
C
LOCKS
C
RYSTAL
-
TO
-
LVCMOS/LVTTL F
REQUENCY
S
YNTHESIZER
PRELIMINARY
R
ELIABILITY
I
NFORMATION
T
RANSISTOR
C
OUNT
The transistor count for ICS840004I-01 is: TBD
T
ABLE
6.
θ
JA
VS
. A
IR
F
LOW
T
ABLE
FOR
20 L
EAD
TSSOP
θ
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
114.5°C/W
73.2°C/W
98.0°C/W
66.6°C/W
88.0°C/W
63.5°C/W
NOTE:
Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
L
AYOUT
G
UIDELINE
Figure 3shows a schematic example of the ICS840004I-01. An
example of LVCMOS termination is shown in this schematic.
Additional LVCMOS termination approaches are shown in the
LVCMOS Termination Application Note. In this example, an 18pF
parallel resonant 25MHz crystal is used. The C1=22pF and
F
IGURE
3. ICS840004I-01 S
CHEMATIC
E
XAMPLE
C2=22pF are recommended for frequency accuracy. For differ-
ent board layout, the C1 and C2 may be slightly adjusted for
optimizing frequency accuracy. 1K
Ω
pullup or pulldown resis-
tors can be used for the logic control input pins.
XTAL_IN
Unused outputs can be left floating. There should be
no trace attached to unused outputs. Device
characterized and specification limits set with all
outputs terminated.
RU1
1K
LVCMOS
VDDO=3.3V
R4
100
R3
36
Logic Control Input Examples
VDDA
C5
0.1u
VDD=3.3V
RD1
Not Install
VDD
X1
C3
10uF
To Logic
Input
pins
Optional Termination
VDD
Set Logic
Input to
'1'
R5
U1
ICS840004i-01
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
20
19
18
17
F_SEL0
nc
nXTAL_SEL
TEST_CLK
nPLL_SEL
nc
VDD
XTAL_OUT
XTAL_IN
GND
Q3
Q2
VDDO
F_GND
Q0
Q1
C2
22pF
C6
0.1u
VDDO
RU2
LVCMOS
R2
10
Zo = 50 Ohm
VDD
VDD
VDD
RD2
1K
VDD
Set Logic
Input to
'0'
XTAL_OUT
C1
To Logic
Input
pins
If not using the crystal input, it can be left floating.
For additional protection the XTAL_IN pin can be
tied to ground.
C4
0.01u
Zo = 50 Ohm
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| ICS840004AGIT | FEMTOCLOCKS⑩ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS840004AGI-01LF | 功能描述:IC FREQ SYNTHESIZER 20-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS840004AGI-01LFT | 功能描述:IC FREQ SYNTHESIZER 20-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS840004AGI-01LLF | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER |
| ICS840004AGI-01T | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS? CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER |
| ICS840004AGIT | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER |
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