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參數(shù)資料
| 型號： | ICS667M-01LF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK SYNTHESIZER HDTV 8-SOIC |
| 產(chǎn)品變化通告： | Product Discontinuation 09/Feb/2012 |
| 標準包裝： | 97 |
| 類型： | 時鐘/頻率合成器 |
| PLL： | 是 |
| 輸入： | 時鐘，晶體 |
| 輸出： | CMOS，晶體 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 74.18MHz |
| 除法器/乘法器： | 無/無 |
| 電源電壓： | 3.15 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 其它名稱： | 667M-01LF |
ICS667-01
HDTV CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
IDT / ICS HDTV CLOCK SYNTHESIZER
2
ICS667-01
REV E 051310
Pin Assignment
Pin Descriptions
External Components
Decoupling Capacitor
As with any high performance mixed-signal IC, the
ICS667-01 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01F must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the ICS667-01 to minimize lead
inductance. Pin 5 can be connected to pin 3. No external
power supply filtering is required for the ICS667-01.
Series Termination Resistor
A 33
terminating resistor can be used next to the clock
outputs for trace lengths over one inch.
Crystal Load Capacitors
The total on-chip capacitance is approximately 18 pF. A
parallel resonant, fundamental mode, AT cut 27 MHz crystal
should be used. The device crystal connections should
include pads for small capacitors from X1 to ground and
from X2 to ground. These capacitors are used to adjust the
stray capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming process,
it is important to keep stray capacitance to a minimum by
using very short PCB traces (and no vias) between the
crystal and device. Crystal capacitors, if needed, must be
connected from each of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal (CL -16
pF)*2. In this equation, CL= crystal load capacitance in pF.
Example: For a crystal with an 18 pF load capacitance, each
crystal capacitor would be 4 pF [(18-16) x 2] = 4.
ICLK/X1
VDD
GND
27M
CLK
OE
GND
X2
1
2
3
4
8
7
6
5
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
ICLK/X1
XI
Crystal connection. Connect to a 27 MHz fundamental crystal or clock.
2
VDD
Power
Connect to +3.3 V.
3
GND
Power
Connect to ground.
4
CLK
Output
74.17582418 MHz.
5
GND
Power
Connect to ground.
6
OE
Input
Output enable. Tri-states CLK output when low. Internal pull-up to VDD.
7
27M
Output
27 MHz buffered clock or crystal oscillator output.
8
X2
XO
Crystal connection. Connect to a 27 MHz crystal, or leave unconnected
for clock input.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS667M-01LFT | 功能描述:IC CLK SYNTHESIZER HDTV 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS667M-01T | 功能描述:IC CLK SYNTHESIZER HDTV 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS670-01 | 制造商:ICS 制造商全稱:ICS 功能描述:Low Phase Noise Zero Delay Buffer and Multiplier |
| ICS670-02 | 制造商:ICS 制造商全稱:ICS 功能描述:LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER |
| ICS670-03 | 制造商:ICS 制造商全稱:ICS 功能描述:LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER |
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