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參數(shù)資料
| 型號： | ICS554G-01LF |
| 元件分類： | 時鐘及定時 |
| 英文描述： | LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 0.173 INCH, 0.65 MM PITCH, TSSOP-16 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 67K |
| 代理商： | ICS554G-01LF |
ICS554-01
MDS 554-01 B
1
Revision 052501
In tegr ated C i r cu i t S y st ems q 5 25 Ra ce Str eet, San Jose, C A 95 126 q tel ( 408) 2 95-9 800 q
w w w.ic s t .c o m
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
Description
The ICS554-01 is a low skew clock buffer with a single
complimentary PECL input to four PECL outputs. Part
of ICS’ Clock BlocksTM family, this is our lowest skew
PECL clock buffer. For parts which do not require PECL
inputs or outputs, see the ICS553 for a 1 to 4 low skew
buffer, or the ICS552-02 for a 1 to 8 low skew buffer. For
more than 8 outputs see the MK74CBxxx BuffaloTM
series of clock drivers.
ICS makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.
Features
Input frequency up to 200MHz
Advanced CMOS process
Outputs are skew matched to within 50ps
Packaged in 16 pin TSSOP
One PECL input to 4 PECL output clock drivers
Operating Voltages of 3.3V to 5V
Block Diagram
IN
RES
VDD
0.01mF
1.1k
Q0
VDD
62
270
Q1
VDD
62
270
Q2
VDD
62
270
Q3
VDD
62
270
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS554G-01T | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT |
| ICS554GI-01A | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT |
| ICS554GI-01AT | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT |
| ICS556-01 | 制造商:ICS 制造商全稱:ICS 功能描述:BROADCOM 25 MHZ LVDS CLOCK |
| ICS556-03 | 制造商:ICS 制造商全稱:ICS 功能描述:QUAD LVDS OSCILLATOR/BUFFER |
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