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參數(shù)資料
| 型號： | ICL7660ACPAZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | CMOS Voltage Converters |
| 中文描述： | SWITCHED CAPACITOR CONVERTER, 10 kHz SWITCHING FREQ-MAX, PDIP8 |
| 封裝： | ROHS COMPLIANT, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 281K |
| 代理商： | ICL7660ACPAZ |
9
FN3072.7
October 10, 2005
every cycle. In a typical application where f
OSC
= 10kHz and
C = C
1
= C
2
= 10
μ
F:
R
O
46 + 20 + 5 (ESR
C
)
Since the ESRs of the capacitors are reflected in the output
impedance multiplied by a factor of 5, a high value could
potentially swamp out a low 1/(f
PUMP
C
1
) term, rendering an
increase in switching frequency or filter capacitance ineffective.
Typical electrolytic capacitors may have ESRs as high as 10
.
R
O/
46 + 20 + 5 (ESR
C
)
Since the ESRs of the capacitors are reflected in the output
impedance multiplied by a factor of 5, a high value could
potentially swamp out a low 1/(f
PUMP
C
1
) term, rendering an
increase in switching frequency or filter capacitance ineffective.
Typical electrolytic capacitors may have ESRs as high as 10
.
Output Ripple
ESR also affects the ripple voltage seen at the output. The
total ripple is determined by 2 voltages, A and B, as shown in
Figure 14. Segment A is the voltage drop across the ESR of
C
2
at the instant it goes from being charged by C
1
(current
flow into C
2
) to being discharged through the load (current
flowing out of C
2
). The magnitude of this current change is
2
I
OUT
, hence the total drop is 2
I
OUT
eSR
C2
V. Segment
B is the voltage change across C
2
during time t
2
, the half of
the cycle when C
2
supplies current to the load. The drop at B
is l
OUT
t2/C
2
V. The peak-to-peak ripple voltage is the sum
of these voltage drops:
[
Again, a low ESR capacitor will reset in a higher
performance output.
Paralleling Devices
Any number of ICL7660 and ICL7660A voltage converters
may be paralleled to reduce output resistance. The reservoir
capacitor, C
2
, serves all devices while each device requires
its own pump capacitor, C
1
. The resultant output resistance
would be approximately:
Cascading Devices
The ICL7660 and ICL7660A may be cascaded as shown to
produced larger negative multiplication of the initial supply
voltage. However, due to the finite efficiency of each device,
the practical limit is 10 devices for light loads. The output
voltage is defined by:
V
OUT
= -n (V
IN
),
where n is an integer representing the number of devices
cascaded. The resulting output resistance would be
approximately the weighted sum of the individual ICL7660
and ICL7660A R
OUT
values.
Changing the ICL7660/ICL7660A Oscillator
Frequency
It may be desirable in some applications, due to noise or
other considerations, to increase the oscillator frequency.
This is achieved by overdriving the oscillator from an
external clock, as shown in Figure 17. In order to prevent
possible device latchup, a 1k
resistor must be used in
series with the clock output. In a situation where the
designer has generated the external clock frequency using
TTL logic, the addition of a 10k
pullup resistor to V+ supply
is required. Note that the pump frequency with external
clocking, as with internal clocking, will be
1
/
2
of the clock
frequency. Output transitions occur on the positive-going
edge of the clock.
It is also possible to increase the conversion efficiency of the
ICL7660 and ICL7660A at low load levels by lowering the
oscillator frequency. This reduces the switching losses, and is
shown in Figure 18. However, lowering the oscillator
frequency will cause an undesirable increase in the
impedance of the pump (C
1
) and reservoir (C
2
) capacitors;
this is overcome by increasing the values of C
1
and C
2
by the
same factor that the frequency has been reduced. For
example, the addition of a 100pF capacitor between pin 7
(OSC) and V+ will lower the oscillator frequency to 1kHz from
its nominal frequency of 10kHz (a multiple of 10), and thereby
necessitate a corresponding increase in the value of C
1
and
C
2
(from 10
μ
F to 100
μ
F).
R
O
2 (23) +
1
+ 4 (ESR
C1
) + ESR
C2
(5
10
3
) (10
-5
)
R
O
2 (23) +
1
+ 4 (ESR
C1
) + ESR
C2
(5
10
3
) (10-
5
)
V
RIPPLE
1
+ 2 (ESR
C2
)
]
I
OUT
2 (f
PUMP
) (C2)
R
OUT
=
R
OUT
(of ICL7660/ICL7660A)
n (number of devices)
1
2
3
4
8
7
6
5
+
-
10
μ
F
ICL7660
ICL7660A
V
OUT
V+
+
-
10
μ
F
V+
CMOS
GATE
1k
FIGURE 17. EXTERNAL CLOCKING
ICL7660, ICL7660A
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|---|---|
| ICL7660AIBA | 功能描述:電荷泵 CMOS VAGE CNVRTR IND RoHS:否 制造商:Maxim Integrated 功能:Inverting, Step Up 輸出電壓:- 1.5 V to - 5.5 V, 3 V to 11 V 輸出電流:100 mA 電源電流:1 mA 最大工作溫度:+ 70 C 封裝 / 箱體:SOIC-8 Narrow 封裝:Tube |
| ICL7660AIBA-T | 功能描述:電荷泵 CMOS VAGE CNVRTR IND TAPE RoHS:否 制造商:Maxim Integrated 功能:Inverting, Step Up 輸出電壓:- 1.5 V to - 5.5 V, 3 V to 11 V 輸出電流:100 mA 電源電流:1 mA 最大工作溫度:+ 70 C 封裝 / 箱體:SOIC-8 Narrow 封裝:Tube |
| ICL7660AIBA-TS2380 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ICL7660AIBAZA | 功能描述:電荷泵 W/ANNEAL CMOS VAGE CNVRTR IND RoHS:否 制造商:Maxim Integrated 功能:Inverting, Step Up 輸出電壓:- 1.5 V to - 5.5 V, 3 V to 11 V 輸出電流:100 mA 電源電流:1 mA 最大工作溫度:+ 70 C 封裝 / 箱體:SOIC-8 Narrow 封裝:Tube |
| ICL7660AIBAZA-T | 功能描述:電荷泵 W/ANNEAL CMOS VAGE CNVRTR IND TAPE & R RoHS:否 制造商:Maxim Integrated 功能:Inverting, Step Up 輸出電壓:- 1.5 V to - 5.5 V, 3 V to 11 V 輸出電流:100 mA 電源電流:1 mA 最大工作溫度:+ 70 C 封裝 / 箱體:SOIC-8 Narrow 封裝:Tube |
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