參數(shù)資料
型號(hào): HYS72T512522HFN-3S-A
廠商: QIMONDA AG
元件分類: DRAM
英文描述: 240-Pin Fully-Buffered DDR2 SDRAM Modules
中文描述: 512M X 72 DDR DRAM MODULE, PDMA240
封裝: GREEN, DIMM-240
文件頁數(shù): 27/41頁
文件大?。?/td> 985K
代理商: HYS72T512522HFN-3S-A
Internet Data Sheet
Rev. 1.3, 2006-12
03292006-QQ89-IKE4
27
HYS72T512[4/5]22HFN–[3S/3.7]–A
240-Pin Fully-Buffered DDR2 SDRAM Modules
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
t
CAS.MIN
(min. CAS Latency Time)
Write Recovery Values Supported (WR)
t
WR.MIN
(Write Recovery Time)
Write Latency Times Supported
Additive Latency Times Supported
t
RCD.MIN
(min. RAS# to CAS# Delay)
t
RRD.MIN
(min. Row Active to Row Active Delay)
t
RP.MIN
(min. Row Precharge Time)
t
RAS
and
t
RC
Extension
t
RAS.MIN
(min. Active to Precharge Time)
t
RC.MIN
(min. Active to Active / Refresh Time)
t
RFC.MIN
LSB (min. Refresh Recovery Time Delay)
t
RFC.MIN
MSB (min. Refresh Recovery Time Delay)
t
WTR.MIN
(min. Internal Write to Read Cmd Delay)
t
RTP.MIN
(min. Internal Read to Precharge Cmd Delay)
Burst Lengths Supported
Terminations Supported
Drive Strength Supported
t
REFI
(avg. SDRAM Refresh Period)
T
CASE.MAX
Delta /
T
4R4W
Delta
Psi(T-A) DRAM
T
0
(DT0) DRAM
T
2Q
(DT2Q) DRAM
T
2P
(DT2P) DRAM
T
3N
(DT3N) DRAM
T
4R
(DT4R) /
T
4R4W
Sign (DT4R4W) DRAM
3C
42
3C
72
50
3C
1E
3C
00
B4
F0
FE
01
1E
1E
03
07
01
C2
50
58
34
21
21
24
4A
3C
42
3C
72
50
3C
1E
3C
00
B4
F0
FE
01
1E
1E
03
07
01
C2
50
58
34
21
21
24
4A
Product Type
H
H
Organization
4 GByte
4 GByte
×
72
×
72
2 Ranks (
×
4)
2 Ranks (
×
4)
Label Code
PC2–5300F–555
PC2–5300F–555
JEDEC SPD Revision
Rev. 1.1
Rev. 1.1
Byte#
Description
HEX
HEX
相關(guān)PDF資料
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