參數(shù)資料
型號(hào)： HYS72T32000HR-5-A
廠商： QIMONDA AG
元件分類： DRAM
英文描述： 240-Pin Registered DDR2 SDRAM Modules
中文描述： 32M X 72 DDR DRAM MODULE, 0.6 ns, DMA240
封裝： GREEN, DIMM-240
文件頁(yè)數(shù)： 23/67頁(yè)
文件大?。?/td> 1462K
代理商： HYS72T32000HR-5-A
Internet Data Sheet
Rev. 1.21, 2007-03
09152006-J5FK-C565
23
HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A
Registered DDR2 SDRAM Modules
DQS latching rising transition to associated clock
edges
DQS input high pulse width
DQS input low pulse width
DQS falling edge to CK setup time
DQS falling edge hold time from CK
Write postamble
Write preamble
Address and control input setup time
Address and control input hold time
Read preamble
Read postamble
Active to precharge command
Active to active command period for 1KB page
size products
Active to active command period for 2KB page
size products
Four Activate Window for 1KB page size products
t
FAW
Four Activate Window for 2KB page size products
t
FAW
CAS to CAS command delay
Write recovery time
Auto-Precharge write recovery + precharge time
Internal write to read command delay
Internal Read to Precharge command delay
Exit self-refresh to a non-read command
Exit self-refresh to read command
Exit precharge power-down to any valid
command (other than NOP or Deselect)
Exit power down to read command
Exit active power-down mode to read command
(slow exit, lower power)
CKE minimum pulse width ( high and low pulse
width)
ODT turn-on delay
ODT turn-on
ODT turn-on (Power down mode)
t
DQSS
– 0.25
+ 0.25
t
CK.AVG
21)
t
DQSH
t
DQSL
t
DSS
t
DSH
t
WPST
t
WPRE
t
LS.BASE
t
LH.BASE
t
RPRE
t
RPST
t
RAS
t
RRD
0.35
0.35
0.2
0.2
0.4
0.35
200
275
0.9
0.4
45
7.5
—
—
—
—
0.6
—
—
—
1.1
0.6
70000
—
t
CK.AVG
t
CK.AVG
t
CK.AVG
t
CK.AVG
t
CK.AVG
t
CK.AVG
ps
ps
t
CK.AVG
t
CK.AVG
ns
ns
—
—
21)
21)
—
—
22)23)
23)24)
25)26)
25)27)
28)
28)
t
RRD
10
—
ns
28)
37.5
50
2
15
WR +
t
nRP
7.5
7.5
t
RFC
+10
200
2
—
—
—
—
—
—
—
—
—
—
ns
ns
nCK
ns
nCK
ns
ns
ns
nCK
nCK
28)
28)
t
CCD
t
WR
t
DAL
t
WTR
t
RTP
t
XSNR
t
XSRD
t
XP
—
28)
29)30)
28)31)
28)
28)
—
—
t
XARD
t
XARDS
2
7 – AL
—
—
nCK
nCK
—
—
t
CKE
3
—
nCK
32)
t
AOND
t
AON
t
AONPD
2
t
AC.MIN
t
AC.MIN
+ 2
2
t
AC.MAX
+ 0.7
2 x
t
CK.AVG
+
t
AC.MAX
+ 1
2.5
t
AC.MAX
+ 0.6
2.5 x
t
CK.AVG
+
t
AC.MAX
+ 1
nCK
ns
ns
—
9)33)
—
ODT turn-off delay
ODT turn-off
ODT turn-off (Power down mode)
t
AOFD
t
AOF
t
AOFPD
2.5
t
AC.MIN
t
AC.MIN
+ 2
nCK
ns
ns
—
34)35)
—
Parameter
Symbol
DDR2–667
Unit
Note
1)2)3)4)5)6)7)
8)
Min.
Max.
相關(guān)PDF資料
PDF描述
HYS72T64001HR 240-Pin Registered DDR2 SDRAM Modules
HYS72T64001HR-2.5-A 240-Pin Registered DDR2 SDRAM Modules
HYS72T64001HR-3.7-A 240-Pin Registered DDR2 SDRAM Modules
HYS72T64001HR-3-A 240-Pin Registered DDR2 SDRAM Modules
HYS72T64001HR-3S-A 240-Pin Registered DDR2 SDRAM Modules
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72T32000HU 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules
HYS72T32000HU-2.5-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules
HYS72T32000HU-25F-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules
HYS72T32000HU-3.7-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules
HYS72T32000HU-3-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules
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