參數(shù)資料
型號(hào)： HYS72T256322HP-3.7-A
廠商： QIMONDA AG
元件分類： DRAM
英文描述： 240-Pin Dual-Die Registered DDR2 SDRAM Modules
中文描述： 256M X 72 DDR DRAM MODULE, 0.5 ns, DMA240
封裝： GREEN, RDIMM-240
文件頁(yè)數(shù)： 26/36頁(yè)
文件大小： 1002K
代理商： HYS72T256322HP-3.7-A
Internet Data Sheet
Rev. 1.01, 2006-09
03062006-PK3L-ZYSE
27
HYS72T256322HP–[3S/3.7]–A
Registered DDR2 SDRAM Modules
TABLE 19
Definitions for I
DD
Self-Refresh Current
CKE
≤
0.2 V; external clock off, CK and CK at 0 V; Other control and address inputs are
FLOATING, Data bus inputs are FLOATING. RESET is LOW.
I
DD6
current values are
guaranteed up to
T
CASE
of 85
°
C max.
All Bank Interleave Read Current
All banks are being interleaved at minimum
t
RC
without violating
t
RRD
using a burst length of 4.
Control and address bus inputs are STABLE during DESELECTS.
I
OUT
= 0 mA.
1)
V
DDQ
= 1.8 V
±
0.1 V;
V
DD
= 1.8 V
±
0.1 V
2) IDD specifications are tested after the device is properly initialized and IDD parameter are specified with ODT disabled.
3) Definitions for
I
DD
see
Table 19
4)
I
DD1
,
I
DD4R
and
I
DD7
current measurements are defined with the outputs disabled (
I
OUT
= 0 mA). To achieve this on module level the output
buffers can be disabled using an EMRS(1) (Extended Mode Register Command) by setting A12 bit to HIGH.
5) For two rank modules: for all active current measurements the other rank is in Precharge Power-Down Mode
I
DD2P
6) RESET signal is HIGH for all currents, except for
I
DD6
(Self Refresh)
7) All current measurements includes Register and PLL current consumption
8) For details and notes see the relevant Qimonda component data sheet
I
DD6
I
DD7
Parameter
Description
LOW
STABLE
FLOATING
SWITCHING
V
IN
≤
V
IL(ac).MAX
, HIGH is defined as
V
IN
≥
V
IH(ac).MIN
inputs are stable at a HIGH or LOW level
inputs are
V
REF
=
V
DDQ
/2
inputs are changing between HIGH and LOW every other clock (once per 2 cycles) for address and control
signals, and inputs changing between HIGH and LOW every other data transfer (once per cycle) for DQ
signals not including mask or strobes.
Parameter
Symbol
Note
1)2)3)4)5)6)7)8)
相關(guān)PDF資料
PDF描述
HYS72T256322HP-3S-A 240-Pin Dual-Die Registered DDR2 SDRAM Modules
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HYS72T32000HR 240-Pin Registered DDR2 SDRAM Modules
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72T256322HP-3S-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Dual-Die Registered DDR2 SDRAM Modules
HYS72T256420HFD-3.7-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T256420HFD-3S-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T256420HFD-3S-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T256420HFN-3.7-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
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