參數(shù)資料
型號(hào)： HYS72T256000ER-5-B
廠商： QIMONDA AG
元件分類： DRAM
英文描述： 240-Pin Registered DDR2 SDRAM Modules
中文描述： 256M X 72 DDR DRAM MODULE, 0.6 ns, DMA240
封裝： GREEN, RDIMM-240
文件頁(yè)數(shù)： 21/33頁(yè)
文件大?。?/td> 892K
代理商： HYS72T256000ER-5-B
Internet Data Sheet
Rev. 1.0, 2006-10
10202006-EHWJ-OT02
21
HYS72T256000ER-[3.7/5]-B
Registerd DDR2 SDRAM Module
3.3.3
ODT AC Electrical Characteristics
TABLE 16
ODT AC Character. and Operating Conditions for DDR2-533 & DDR2-400
13) The
t
HZ
,
t
RPST
and
t
LZ
,
t
RPRE
parameters are referenced to a specific voltage level, which specify when the device output is no longer driving
(
t
t
), or begins driving (
t
t
).
t
and
t
transitions occur in the same access time windows as valid data transitions.These
parameters are verified by design and characterization, but not subject to production test.
14) The Auto-Refresh command interval has be reduced to 3.9 μs when operating the DDR2 DRAM in a temperature range between 85
°
C
and 95
°
C.
15) 0 °C
≤
T
CASE
≤
85
°
C
16) 85
°
C
<
T
CASE
≤
95
°
C
17) A maximum of eight Auto-Refresh commands can be posted to any given DDR2 SDRAM device.
18) The
t
timing parameter depends on the page size of the DRAM organization. See
Table 2 “Ordering Information for RoHS
Compliant Products” on Page 4
.
19) The maximum limit for the
t
parameter is not a device limit. The device operates with a greater value for this parameter, but system
performance (bus turnaround) degrades accordingly.
20) WR must be programmed to fulfill the minimum requirement for the
t
timing parameter, where
WR
[cycles] =
t
(ns)/
t
(ns) rounded
up to the next integer value.
t
= WR + (
t
/
t
). For each of the terms, if not already an integer, round to the next highest integer.
t
CK
refers to the application clock period. WR refers to the WR parameter stored in the MRS.
21) Minimum
t
WTR
is two clocks when operating the DDR2-SDRAM at frequencies
≤ 200 ΜΗ
z.
22) User can choose two different active power-down modes for additional power saving via MRS address bit A12. In “standard active power-
down mode” (MR, A12 = “0”) a fast power-down exit timing
t
XARD
can be used. In “l(fā)ow active power-down mode” (MR, A12 =”1”) a slow
power-down exit timing
t
XARDS
has to be satisfied.
Symbol
Parameter / Condition
Values
Unit
Note
Min.
Max.
t
AOND
t
AON
t
AONPD
t
AOFD
t
AOF
t
AOFPD
t
ANPD
t
AXPD
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down Modes)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down Modes)
ODT to Power Down Mode Entry Latency
ODT Power Down Exit Latency
2
t
AC.MIN
t
AC.MIN
+ 2 ns
2.5
t
AC.MIN
t
AC.MIN
+ 2 ns
3
8
2
t
AC.MAX
+ 1 ns
2
t
CK +
t
AC.MAX
+ 1 ns
2.5
t
AC.MAX
+ 0.6 ns
2.5
t
CK +
t
AC.MAX
+ 1 ns
—
—
t
CK
ns
ns
t
CK
ns
ns
t
CK
t
CK
1)
1) ODT turn on time min is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when the
ODT resistance is fully on. Both are measured from
t
AOND
, which is interpreted differently per speed bin. For DDR2-400/533,
t
AOND
is 10 ns
(= 2 x 5 ns) after the clock edge that registered a first ODT HIGH if
t
CK
= 5 ns.
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Both are measured from
t
. Both are measured from
t
, which is interpreted differently per speed bin. For DDR2-400/533,
t
AOFD
is
12.5 ns (= 2.5 x 5 ns) after the clock edge that registered a first ODT HIGH if
t
CK
= 5 ns.
2)
相關(guān)PDF資料
PDF描述
HYS72T256020EU-2.5-B 240-Pin unbuffered DDR2 SDRAM Modules
HYS72T256020EU-25F-B 240-Pin unbuffered DDR2 SDRAM Modules
HYS72T256020EU-3.7-B 240-Pin unbuffered DDR2 SDRAM Modules
HYS72T256020EU-3-B 240-Pin unbuffered DDR2 SDRAM Modules
HYS72T256020EU-3S-B 240-Pin unbuffered DDR2 SDRAM Modules
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72T256000HR 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR SDRAM Modules
HYS72T256000HR-3.7-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR SDRAM Modules
HYS72T256000HR-3S-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR SDRAM Modules
HYS72T256000HR-5-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR SDRAM Modules
HYS72T256020EU-2.5-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*