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參數(shù)資料
| 型號： | HYS72T128020HFA-3S-B |
| 廠商： | QIMONDA AG |
| 元件分類： | DRAM |
| 英文描述： | 240-Pin Fully-Buffered DDR2 SDRAM Modules |
| 中文描述： | 128M X 72 DDR DRAM MODULE, DMA240 |
| 封裝： | GREEN, DIMM-240 |
| 文件頁數(shù)： | 19/47頁 |
| 文件大?。?/td> | 1378K |
| 代理商： | HYS72T128020HFA-3S-B |
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HYS72T[64/128/256]4[00/20]HFA–[2.5/3S/3.7]–B
Fully-Buffered DDR2 SDRAM Modules
Internet Data Sheet
Rev.1.01, 2007-06-20
10062006-RQWY-GI6S
19
5
Current Spec. and Conditions
The following table provides an overview of the measurement conditions.
TABLE 13
I
DD
Measurement Conditions
Notes
1. Primary channel Drive strength at 100 % with De-emphasis at -6.5 dB
2. Secondary channel drive strength at 60 % with De-emphasis at -3 dB when enabled.
Parameter
Symbol
Idle Current, single or last DIMM
L0 state, idle (0 BW)
Primary channel enabled, Secondary channel disabled
CKE high. Command and address lines stable.
DRAM clock active
Idle Current, first DIMM
L0 state, idle (0 BW)
Primary and Secondary channels enabled.
CKE high. Command and address lines stable.
DRAM clock active
Active Power
L0 state
50% DRAM BW, 67% read, 33% write.
Primary and Secondary channels enabled.
DRAM clock active, CKE high.
Active Power, data pass through
L0 state
50% DRAM BW to downstream DIMM, 67% read, 33% write.
Primary and Secondary channels enabled.
CKE high. Command and address lines stable.
DRAM clock active.
Training
Primary and Secondary channels enabled.
100% toggle on all channels lanes.
DRAMs idle (0 BW).
CKE high. Command and address lines stable.
DRAM clock active.
IBIST
Over all IBIST modesDRAM Idle (0 BW)Primary channel EnabledSecondary channel EnabledCKE high.
Command and Address lines stableDRAM clock active
MemBIST
Over all MemBIST modes
>
50% DRAM BW (as dictated by the AMB)Primary channel EnabledSecondary
channel EnabledCKE high. Command and Address lines stableDRAM clock active
Electrical Idle
DRAM Idle (0 BW)Primary channel DisabledSecondary channel DisabledCKE low. Command and Address
lines FloatedDRAM clock active, ODT and CKE driven low
I
CC_Idle_0
I
DD_Idle_0
I
CC_Idle_1
I
DD_Idle_1
I
CC_Active_1
I
DD_Active_1
I
CC_Active_2
I
DD_Active_2
I
CC_Training
I
DD_Training
I
CC_IBIST
I
DD_IBIST
I
CC_MEMBIST
I
DD_MEMBIST
I
CC_EI
I
DD_EI
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72T128020HP | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules |
| HYS72T128020HP-2.5-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules |
| HYS72T128020HP-25F-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules |
| HYS72T128020HP-3.7-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules |
| HYS72T128020HP-3.7-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules |
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