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參數(shù)資料
| 型號(hào)： | HYS72D64301HBR_07 |
| 廠商： | QIMONDA |
| 英文描述： | 184-Pin Registered Double-Data-Rate SDRAM Module |
| 中文描述： | 184引腳錄得雙數(shù)據(jù)速率SDRAM模塊 |
| 文件頁數(shù)： | 17/39頁 |
| 文件大?。?/td> | 1223K |
| 代理商： | HYS72D64301HBR_07 |
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Internet Data Sheet
Rev. 1.22, 2007-08
03292006-6N25-8R3I
17
HYS72D[64/128/256]xxxHBR–[5/6]–C
Registered Double-Data-Rate SDRAM Module
7) t
HZ
and t
LZ
transitions occur in the same access time windows as valid data transitions. These parameters are not referred to a specific
voltage level, but specify when the device is no longer driving (HZ), or begins driving (LZ).
8) Fast slew rate
≥
1.0 V/ns , slow slew rate
≥
0.5 V/ns and < 1 V/ns for command/address and CK & CK slew rate > 1.0 V/ns, measured
between V
IH(ac)
and V
IL(ac)
.
9) These parameters guarantee device timing, but they are not necessarily tested on each device.
10) A maximun of eight Autorefresh commands can be posted to any given DDR SDRAM device
11) The specific requirement is that DQS be valid (HIGH,LOW, or some point on a valid transition) on or before this CK edge. A valid transition
is defined as monotonic and meeting the input slew rate specificationsof the device. When no writes were previously in progress on the
bus, DQS will be transitioning from Hi-Z to logic LOW. If a previous write was in progress, DQS could be HIGH, LOW at this time, depending
on t
DQSS
.
12) The maximum limit for this parameter is not a device limit. The device operates with a greater value for this parameter, but system
performance (bus turnaround) degrades accordingly.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72D64301HBR-5-C | 184-Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D64301HBR-6-C | 184-Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D64301HBR-6-B | 184 - Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D64301 | 184 - Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D64301GBR-5-B | 184 - Pin Registered Double-Data-Rate SDRAM Module |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72D64301HBR-5-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184 - Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D64301HBR-5-C | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D64301HBR-6-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184 - Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D64301HBR-6-C | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D64320 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Registered Double Data Rate SDRAM Module |
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