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參數(shù)資料
| 型號(hào)： | HYB18T1G800TC-3 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | MEMORY SPECTRUM |
| 中文描述： | 記憶譜 |
| 文件頁(yè)數(shù)： | 35/89頁(yè) |
| 文件大?。?/td> | 1752K |
| 代理商： | HYB18T1G800TC-3 |
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HYB18T1G400/800/160AF
1Gb DDR2 SDRAM
INFINEON Technologies
Page 35 Rev. 1.02 May 2004
The seamless burst read operation is supported by enabling a read command at every BL / 2 number of clocks.
This operation is allowed regardless of same or different banks as long as the banks are activated.
The seamless, non interrupting 8-bit burst read operation is supported by enabling a read command at every BL /
2 number of clocks. This operation is allowed regardless of same or different banks as long as the banks are acti-
vated.
Seamless Burst Read Operation: RL = 5, AL = 2, CL = 3, BL = 4
Seamless Burst Read Operation: RL = 3, AL = 0, CL = 3, BL = 8 (non interrupting)
NOP
NOP
NOP
NOP
NOP
NOP
NOP
READ A
Post CAS
READ B
Post CAS
T0
T2
T1
T3
T4
T5
T6
T7
T8
Dout A0
Dout A1
Dout A2
Dout A3
Dout B0
Dout B1
Dout B2
Dout B3
RL = 5
AL = 2
CL = 3
SBR523
CMD
DQ
DQS,
DQS
CK, CK
NOP
NOP
NOP
READ A
Post CAS
T0
T2
T1
T3
T4
T5
T6
T7
T8
Dout A0
Dout A1
Dout A2
Dout A3
Dout A4
Dout A5
Dout A4
Dout A7
RL = 3
CL = 3
SBR_BL8
CMD
DQ
DQS,
DQS
READ B
Post CAS
Dout B0
Dout B1
Dout B2
Dout B3 Dou
NOP
NOP
NOP
NOP
NO
T9
CK, CK
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