參數(shù)資料
型號(hào): HY5S6B6DLFP-SE
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 4Banks x1M x 16bits Synchronous DRAM
中文描述: 4M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54
封裝: 0.80 MM PITCH, LEAD FREE, FBGA-54
文件頁(yè)數(shù): 21/27頁(yè)
文件大小: 368K
代理商: HY5S6B6DLFP-SE
Rev 0.3 / July 2004
21
HY5S6B6D(L/S)F(P)-xE
4Banks x 1M x 16bits Synchronous DRAM
DC CHARACTERISTICS II
(T
A
= 25 to 85
o
C
)
Note :
1. I
DD1
and I
DD4
depend on output loading and cycle rates. Specified values are measured with the output open
2. See the tables of next page for more specific I
DD6
current values.
Parameter
Symbol
Test Condition
Speed
Unit Note
-S
-B
Operating Current
I
DD1
Burst length=1, One bank active
t
RC
t
RC
(min), I
OL
=0mA
50
35
mA
1
Precharge Standby Current
in Power Down Mode
I
DD2P
CKE
V
IL
(max), t
CK
= 15ns
0.5
mA
I
DD2PS
CKE
V
IL
(max), t
CK
=
0.3
mA
Precharge Standby Current
in Non Power Down Mode
I
DD2N
CKE
V
IH
(min), CS
V
IH
(min), t
CK
= 15ns
Input signals are changed one time during
2clks.
All other pins
V
DD
-0.2V or
0.2V
5.5
mA
I
DD2NS
CKE
V
IH
(min), t
CK
=
Input signals are stable.
2
Active Standby Current
in Power Down Mode
I
DD3P
CKE
V
IL
(max), t
CK
= 15ns
1.5
mA
I
DD3PS
CKE
V
IL
(max), t
CK
=
1
Active Standby Current
in Non Power Down Mode
I
DD3N
CKE
V
IH
(min), CS
V
IH
(min), t
CK
= 15ns
Input signals are changed one time during
2clks.
All other pins
V
DD
-0.2V or
0.2V
12
mA
I
DD3NS
CKE
V
IH
(min), t
CK
=
Input signals are stable.
6
Burst Mode Operating
Current
I
DD4
t
CK
t
CK
(min), I
OL
=0mA
All banks active
60
40
mA
1
Auto Refresh Current
I
DD5
t
RC
t
ARFC
(min), All banks active
80
60
mA
Self Refresh Current
I
DD6
CKE
0.2V
See Next Page
mA
2
Standby Current in
Deep Power Down Mode
I
DD7
See p.25~26
50
uA
- Low Power
: HY5S6B6DLF Series
- Super Low Power
: HY5S6B6DSF Series
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