參數(shù)資料
型號： HY5PS12423LF
英文描述： 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
中文描述： 128Mx4 | 1.8 | 8K的| D43/D44/D54/D55 |的DDR II內(nèi)存- 512M
文件頁數(shù)： 33/66頁
文件大?。?/td> 862K
代理商： HY5PS12423LF
Rev. 0.52/Nov. 02 33
HY5PS12423(L)F
HY5PS12823(L)F
HY5PS121623(L)F
ON DIE TERMINATION
On DRAM Termination (ODT), is a feature that allows a DRAM to turn on/off an active termination resistance for DQ,
DQS / DQS, RDQS / RDQS, and DM signals via the ODT control pin. The ODT feature is designed to improve signal
integrity of the memory channel by allowing the DRAM controller to independently turn on/off termination resistance
for any or all DRAM devices. This proposal outlines DDR-II SDRAM ODT definition and functionality for ACTIVE and
STANDBY modes. The Active Termination function is turned off and not supported in SELF REFRESH mode.
FUNCTIONAL REPRESENTATION OF ODT
Input
Pin
DRAM
input
Buffer
VDDQ
VSSQ
sw1
Rval1
Rval1
sw1
VDDQ
VSSQ
sw2
Rval2
Rval2
sw2
Switch sw1 or sw2 is enabled by ODT pin.
Selection between sw1 or sw2 is determined by “Rtt(nominal)” in EMRS.
Termination included on all DQs, DM, DQS, DQS, RDQS, and RDQS pins.
Target Rtt (Ohm) = (Rval1) / 2 or (Rval2) / 2
相關(guān)PDF資料
PDF描述
HY5PS12823F 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12823LF 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5P Current Transducers HY 5 to 25-P/SP1
HY5R256HC -|2.5V|8K|40|Direct RDRAM - 256M
HY5R288HC -|2.5V|8K|40|Direct RDRAM - 288M
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