參數(shù)資料
型號(hào)： HY5PS12423F
英文描述： 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
中文描述： 128Mx4 | 1.8 | 8K的| D43/D44/D54/D55 |的DDR II內(nèi)存- 512M
文件頁(yè)數(shù)： 37/66頁(yè)
文件大?。?/td> 862K
代理商： HY5PS12423F
Rev. 0.52/Nov. 02 37
HY5PS12423(L)F
HY5PS12823(L)F
HY5PS121623(L)F
ODT Control of READs
At a minimum, ODT must be latched High by CK at (Read Latency - 3tCK) after the Read Command and remain High
until (Read Latency + BL/2 - 2tCK) after the RD command (where Read Latency = AL + CL). The controller is also
required to activate it’s own termination with a turn on time the same as the DRAM and keeping it on until valid data
is no longer on the system bus.
CK
CK
T0
T1
T2
T3
T4
T5
T6
ODT
Controller
Term Res.
CMD
(to slot1)
Rtt(Controller)
RD
RD
at DRAM in slot1
CMD
Data Out
Read Latency
DQs
DQS
DQS
ODT
DRAM
Term Res.
Rtt(DRAM)
tAOND
tAOFD
at DRAM in slot2
Read Example for a 2 slot registered system with 2nd slot in Active Mode
(Read Latency = 3tCK; tAOND = 2tCK; tAOFD = 2.5tCK)
相關(guān)PDF資料
PDF描述
HY5PS12423LF 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12823F 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12823LF 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5P Current Transducers HY 5 to 25-P/SP1
HY5R256HC -|2.5V|8K|40|Direct RDRAM - 256M
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HY5PS12423LF 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12821AF 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:512Mb DDR2 SDRAM
HY5PS12821AF-C3 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:512Mb DDR2 SDRAM
HY5PS12821AF-C4 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:512Mb DDR2 SDRAM
HY5PS12821AF-E3 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:512Mb DDR2 SDRAM
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*