參數(shù)資料
型號(hào): HY5DU56422DTP-X
廠商: Hynix Semiconductor Inc.
英文描述: 256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)
中文描述: 256M DDR內(nèi)存(268435456位CMOS雙數(shù)據(jù)速率(DDR)同步DRAM)
文件頁(yè)數(shù): 10/37頁(yè)
文件大?。?/td> 414K
代理商: HY5DU56422DTP-X
Rev. 0.1 /May 2004 10
HY5DU56422D(L)TP
HY5DU56822D(L)TP
HY5DU561622D(L)TP
OPERATION COMMAND TRUTH TABLE-I
Current
State
/CS
/RAS
/CAS
/WE
Address
Command
Action
IDLE
H
X
X
X
X
DSEL
NOP or power down
3
L
H
H
H
X
NOP
NOP or power down
3
L
H
H
L
X
BST
ILLEGAL
4
L
H
L
H
BA, CA, AP
READ/READAP
ILLEGAL
4
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
4
L
L
H
H
BA, RA
ACT
Row Activation
L
L
H
L
BA, AP
PRE/PALL
NOP
L
L
L
H
X
AREF/SREF
Auto Refresh or Self Refresh
5
L
L
L
L
OPCODE
MRS
Mode Register Set
ROW
ACTIVE
H
X
X
X
X
DSEL
NOP
L
H
H
H
X
NOP
NOP
L
H
H
L
X
BST
ILLEGAL
4
L
H
L
H
BA, CA, AP
READ/READAP
Begin read : optional AP
6
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
Begin write : optional AP
6
L
L
H
H
BA, RA
ACT
ILLEGAL
4
L
L
H
L
BA, AP
PRE/PALL
Precharge
7
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
READ
H
X
X
X
X
DSEL
Continue burst to end
L
H
H
H
X
NOP
Continue burst to end
L
H
H
L
X
BST
Terminate burst
L
H
L
H
BA, CA, AP
READ/READAP
Term burst, new read:optional AP
8
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
L
L
H
H
BA, RA
ACT
ILLEGAL
4
L
L
H
L
BA, AP
PRE/PALL
Term burst, precharge
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
WRITE
H
X
X
X
X
DSEL
Continue burst to end
L
H
H
H
X
NOP
Continue burst to end
L
H
H
L
X
BST
ILLEGAL
4
L
H
L
H
BA, CA, AP
READ/READAP
Term burst, new read:optional AP
8
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
Term burst, new write:optional AP
相關(guān)PDF資料
PDF描述
HY5DU56822DLTP 256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)
HY5DU56822DLTP-H 256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)
HY5DU56822DLTP-J 256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)
HY5DU56822DLTP-K 256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)
HY5DU56822DLTP-L 256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)
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