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參數(shù)資料
| 型號(hào)： | HY57V643220DLT-5 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 4Banks x 512K x 32bits Synchronous DRAM |
| 中文描述： | 2M X 32 SYNCHRONOUS DRAM, 4.5 ns, PDSO86 |
| 封裝： | 0.400 X 0.875 INCH, 0.50 MM PITCH, TSOP2-86 |
| 文件頁(yè)數(shù)： | 9/13頁(yè) |
| 文件大小： | 227K |
| 代理商： | HY57V643220DLT-5 |
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Rev. 0.3 / Sep. 2004
9
HY57V643220D(L/S)T(P) Series
4Banks x 512K x 32bits Synchronous DRAM
DC CHARACTERISTICS II
(T
A
= 0 to 70
o
C
)
Note :
1. I
DD1
and I
DD4
depend on output loading and cycle rates. Specified values are measured with the output open
2. Min. of tRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3. HY57V643220DT(P) Series
4. HY57V643220DLT(P) Series
5. HY57V643220DST(P) Series
Parameter
Sym-
bol
Test Condition
Speed
Unit Note
45
5
55
6
7
Operating Current
I
DD1
Burst length=1, One bank active
t
RC
≥
t
RC
(min), I
OL
=0mA
220
200
190
180
170
mA
1
Precharge Standby Cur-
rent
in Power Down Mode
I
DD2P
CKE
≤
V
IL
(max), t
CK
= 15ns
2
mA
I
DD2PS
CKE
≤
V
IL
(max), t
CK
=
∞
2
mA
Precharge Standby Cur-
rent
in Non Power Down
Mode
I
DD2N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CK
= 15ns
Input signals are changed one time
during 2clks.
All other pins
≥
V
DD
-0.2V or
≤
0.2V
17
mA
I
DD2NS
CKE
≥
V
IH
(min), t
CK
=
∞
Input signals are stable.
12
Active Standby Current
in Power Down Mode
I
DD3P
CKE
≤
V
IL
(max), t
CK
= 15ns
3
mA
I
DD3PS
CKE
≤
V
IL
(max), t
CK
=
∞
3
Active Standby Current
in Non Power Down
Mode
I
DD3N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CK
= 15ns
Input signals are changed one time
during 2clks.
All other pins
≥
V
DD
-0.2V or
≤
0.2V
40
mA
I
DD3NS
CKE
≥
V
IH
(min), t
CK
=
∞
Input signals are stable.
30
Burst Mode Operating
Current
I
DD4
t
CK
≥
t
CK
(min), I
OL
=0mA
All banks active
CL=3
290
280
260
240
210
mA
1
Auto Refresh Current
I
DD5
t
RC
≥
t
RC
(min), All banks active
260
250
235
220
210
mA
2
Self Refresh Current
I
DD6
CKE
≤
0.2V
Normal
2
mA
3
Low Power
0.8
mA
4
Super Low
Power
450
uA
5
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| HY57V643220DLT-55 | 4Banks x 512K x 32bits Synchronous DRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V643220DLT-55 | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DLT-6 | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DLT-7 | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DLTP-45 | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DLTP-5 | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
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