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參數(shù)資料
| 型號： | HY57V281620ELT |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| 中文描述： | 128Mb的同步DRAM的基礎(chǔ)上2米x 4Bank x16的I / O |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 126K |
| 代理商： | HY57V281620ELT |
Rev. 1.1 / J an. 2005
5
Synchronous DRAM Memory 128Mbit (8Mx16bit)
HY57V281620E(L)T(P) Series
FUNCTIONAL BLOCK DIAGRAM
2Mbit x 4banks x 16 I/ O Synchronous DRAM
Internal Row
Counter
Column
Pre
Decoder
Column Add
Counter
Self refresh
logic & timer
S
Address
Register
Burst
Counter
Mode Register
S
A
Bank Select
Column
Active
Row Active
CAS Latency
CLK
CKE
CS
RAS
CAS
WE
U/LDQM
A0
A1
BA1
BA0
A11
Row
Pre
Decoder
Refresh
DQ0
DQ15
X
X
X
X
Y-Decoder
2Mx16 BANK 0
2Mx16 BANK 1
2Mx16 BANK 2
2Mx16 BANK 3
Memory
Cell
Array
Data Out Control
Pipe Line
Control
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY57V281620ELT-5 | 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| HY57V281620ELT-6 | 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| HY57V281620ELT-7 | 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| HY57V281620ET-6 | 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| HY57V281620ET-7 | 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V281620ELT-5 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| HY57V281620ELT-6 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| HY57V281620ELT-7 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| HY57V281620ELT-H | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
| HY57V281620ELTP-5 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O |
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