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參數(shù)資料
| 型號： | HY29F800ATR-55 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| 中文描述： | 512K X 16 FLASH 5V PROM, 55 ns, PDSO48 |
| 封裝： | REVERSE, TSOP-48 |
| 文件頁數(shù)： | 19/40頁 |
| 文件大?。?/td> | 279K |
| 代理商： | HY29F800ATR-55 |
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19
Rev. 1.1/Feb 02
HY29F800A
HARDWARE DATA PROTECTION
The HY29F800A provides several methods of pro-
tection to prevent accidental erasure or program-
ming which might otherwise be caused by spuri-
ous system level signals during V
CC
power-up and
power-down transitions, or from system noise.
These methods are described in the sections that
follow.
Command Sequences
Commands that may alter array data require a
sequence of cycles as described in Table 5. This
provides data protection against inadvertent writes.
Low V
CC
Write Inhibit
To protect data during V
CC
power-up and power-
down, the device does not accept write cycles
when V
is less than V
(typically 3.7 volts). The
command register and all internal program/erase
circuits are disabled, and the device resets to the
Read mode. Writes are ignored until V
CC
is greater
than V
LKO
. The system must provide the proper
signals to the control pins to prevent unintentional
writes when V
CC
is greater than V
LKO
.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#,
CE# or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by asserting any one of
the following conditions: OE# = V
IL
, CE# = V
IH
, or
WE# = V
IH
. To initiate a write cycle, CE# and WE#
must be a logical zero while OE# is a logical one.
Power-Up Write Inhibit
If WE# = CE# = V
IL
and OE# = V
IH
during power
up, the device does not accept commands on the
rising edge of WE#. The internal state machine is
automatically reset to the Read mode on power-
up.
Sector Protection
Additional data protection is provided by the
HY29F800A
’
s sector protect feature, described
previously, which can be used to protect sensitive
areas of the Flash array from accidental or unau-
thorized attempts to alter the data.
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PDF描述 |
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| HY29F800ATR-55I | 8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| HY29F800ATR-70 | 8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| HY29F800ATR-70I | 8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| HY29F800ATR-90 | 8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| HY29F800ATR-90I | 8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HY29F800ATR-55I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| HY29F800ATR-70 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| HY29F800ATR-70I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| HY29F800ATR-90 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
| HY29F800ATR-90I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory |
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