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Confidential
HV7131R
This document is a general product description and is subject to change without notice. MagnaChip
Semiconductor Ltd. does not assume any responsibility for use of circuits described and no patent
licenses are implied.
- 19 -
2004 MagnaChip Semiconductor Ltd.
Controls the amount of current in internal amplifier bias circuit to amplify pixel output effectively.
The larger register value increases the amount of current
CDS Bias
Controls the amount of current in internal CDS bias circuit to amplify pixel output effectively. The
larger register value increases the amount of current
Analog Bias Control B [ACTRB : 35h : 7fh]
7
6
5
4
3
2
1
0
Reset Clamp
ADC Bias
0
1
1
1
1
1
1
1
Reset Level Clamp
Because extremely bright image like sun affects reset data voltage of pixel to lower, bright
image is captured as black image in image sensor regardless of correlated double sampling. To
solve this extraordinary phenomenon, we adopt the method to clamp reset data voltage. Reset
Level Clamp controls the reset data voltage to prevent inversion of extremely bright image. The
larger register value clamps the reset data level at highest voltage level. Default value is 7 to
clamp the reset data level at appropriate voltage level.
ADC Bias
ADC Bias controls the amount of current in ADC bias circuit to operate ADC effectively. The
larger register value increase the amount of current
Black Level Threshold [BLCTH : 40h : ffh]
7
6
5
4
3
2
1
0
Black Level Threshold
1
1
1
1
1
1
1
1
The register specifies the maximum value, which determines whether light shielded pixel output,
is valid. When light shielded pixel output exceeds this limit, the pixel is not accounted for black
level calculation.